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drivers: gpio: stm32: add ASCR configuration for L47x+ #14131
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drivers: gpio: stm32: add ASCR configuration for L47x+ #14131
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Codecov Report
@@ Coverage Diff @@
## master #14131 +/- ##
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Coverage 51.97% 51.97%
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Files 309 309
Lines 45582 45582
Branches 10555 10555
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Hits 23691 23691
Misses 17082 17082
Partials 4809 4809Continue to review full report at Codecov.
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drivers/gpio/gpio_stm32.c
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A comment in the code explaining why we're doing this would be nice.
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Can you move the comment inside the #if def ?
I prefer this way because it could happen sometime that people add code between comment and code so we don't know anymore what is the comment related to. If comment is inside the ifdef this is less likely to happen.
Also, please rephrase to "For STM32L47xx/48xx, register ASCR should be configured to connect analog switch of gpio lines to the ADC."
drivers/gpio/gpio_stm32.c
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Should this be done for every pin, and any configuration?
I mean, if I configure a led or an uart pin, I'll run into this code, is this correct?
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Sorry, this is wrong, my mistake... should be only configured in analog mode.
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drivers/gpio/gpio_stm32.c
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Can you move the comment inside the #if def ?
I prefer this way because it could happen sometime that people add code between comment and code so we don't know anymore what is the comment related to. If comment is inside the ifdef this is less likely to happen.
Also, please rephrase to "For STM32L47xx/48xx, register ASCR should be configured to connect analog switch of gpio lines to the ADC."
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@erwango Sorry for the delay, my computer is out of order and has been sent for repair, so I'll make the change about 2-4 days later. |
No hurry, this is for 1.15 |
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For STM32L47x/48x series devices, register ASCR should be configured to connect analog switch of gpio lines to the ADC. Signed-off-by: Song Qiang <[email protected]>
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For STM32L47x/48x series devices, if we want to configure one
GPIO line as ADC input, we have to set the corresponding
bit in GPIOx_ASCR register to get ADC and GPIO line connected.
Signed-off-by: Song Qiang [email protected]