Skip to content

drivers/flash: stm32: Extend qspi-nor support to F7 series #31405

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Closed
wants to merge 1 commit into from
Closed

drivers/flash: stm32: Extend qspi-nor support to F7 series #31405

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 2 additions & 0 deletions boards/arm/stm32f746g_disco/doc/index.rst
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -112,6 +112,8 @@ The Zephyr stm32f746g_disco board configuration supports the following hardware
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| QSPI NOR | on-chip | flash |
+-----------+------------+-------------------------------------+

Other hardware features are not yet supported on Zephyr porting.

Expand Down
40 changes: 40 additions & 0 deletions boards/arm/stm32f746g_disco/stm32f746g_disco.dts
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,7 @@
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,flash-controller = &n25q128a1;
};

leds {
Expand Down Expand Up @@ -119,3 +120,42 @@
&eth_txd0_pg13
&eth_txd1_pg14>;
};
&dma2 {
status = "okay";
};

&quadspi {
pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
dmas = <&dma2 7 3 0x0000 0x03>;
dma-names = "tx_rx";

status = "okay";

n25q128a1: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
label = "N25Q128A1";
reg = <0>;
qspi-max-frequency = <108000000>;
/* 128 Megabits = 16 Megabytes */
size = <0x8000000>;
status = "okay";

partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 0x000D8000>;
};

storage_partition: partition@D8000 {
label = "storage";
reg = <0x000D8000 DT_SIZE_M(7)>;
};
};
};
};
2 changes: 2 additions & 0 deletions boards/arm/stm32f769i_disco/doc/index.rst
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -116,6 +116,8 @@ The Zephyr stm32f769i_disco board configuration supports the following hardware
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | Ethernet |
+-----------+------------+-------------------------------------+
| QSPI NOR | on-chip | flash |
+-----------+------------+-------------------------------------+

Other hardware features are not yet supported on Zephyr porting.

Expand Down
41 changes: 41 additions & 0 deletions boards/arm/stm32f769i_disco/stm32f769i_disco.dts
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,7 @@
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,flash-controller = &mx25l51245g;
};

leds {
Expand Down Expand Up @@ -104,3 +105,43 @@ arduino_serial: &usart6 {};
&sdmmc2_ck_pd6 &sdmmc2_cmd_pd7>;
cd-gpios = <&gpioi 15 GPIO_ACTIVE_LOW>;
};

&dma2 {
status = "okay";
};

&quadspi {
pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
&quadspi_bk1_io0_pc9 &quadspi_bk1_io1_pc10
&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pd13>;
dmas = <&dma2 7 3 0x0000 0x03>;
dma-names = "tx_rx";

status = "okay";

mx25l51245g: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
label = "MX25L51245G";
reg = <0>;
qspi-max-frequency = <70000000>;
/* 512 Megabits = 64 Megabytes */
size = <0x20000000>;
status = "okay";

partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;

slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 0x000D8000>;
};

storage_partition: partition@D8000 {
label = "storage";
reg = <0x000D8000 DT_SIZE_M(7)>;
};
};
};
};
3 changes: 1 addition & 2 deletions drivers/flash/flash_stm32_qspi.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -729,8 +729,7 @@ static int flash_stm32_qspi_init(const struct device *dev)
hdma.Init.Mode = DMA_NORMAL;
hdma.Init.Priority = dma_cfg.channel_priority;
#ifdef CONFIG_DMA_STM32_V1
/* TODO: Not tested in this configuration */
hdma.Init.Channel = dma_cfg.dma_slot;
hdma.Init.Channel = dma_cfg.dma_slot << DMA_SxCR_CHSEL_Pos;
hdma.Instance = __LL_DMA_GET_STREAM_INSTANCE(dev_data->dma.reg,
dev_data->dma.channel);
#else
Expand Down
10 changes: 10 additions & 0 deletions dts/arm/st/f7/stm32f7.dtsi
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -679,6 +679,16 @@
status = "disabled";
label = "SDMMC_1";
};
quadspi: quadspi@a0001000 {
compatible = "st,stm32-qspi";
#address-cells = <0x1>;
#size-cells = <0x0>;
reg = <0xa0001000 0x34>;
interrupts = <92 0>;
clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x2>;
status = "disabled";
label = "QUADSPI";
};
};

otghs_fs_phy: otghs_fs_phy {
Expand Down