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7 changes: 6 additions & 1 deletion boards/arm/mimxrt685_evk/mimxrt685_evk_cm33.dts
Original file line number Diff line number Diff line change
Expand Up @@ -96,11 +96,16 @@
power-state-name = "runtime-idle";
min-residency-us = <10>;
};
suspend: suspend {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
min-residency-us = <1000>;
};
};
};

&cpu0 {
cpu-power-states = <&idle>;
cpu-power-states = <&idle &suspend>;
};

/*
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3 changes: 3 additions & 0 deletions drivers/timer/mcux_os_timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
#include <sys_clock.h>
#include <spinlock.h>
#include "fsl_ostimer.h"
#include "fsl_power.h"

#define CYC_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
/ (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
Expand Down Expand Up @@ -59,6 +60,8 @@ int sys_clock_driver_init(const struct device *device)

base = (OSTIMER_Type *)DT_INST_REG_ADDR(0);

EnableDeepSleepIRQ(DT_INST_IRQN(0));

/* Initialize the OS timer, setting clock configuration. */
OSTIMER_Init(base);

Expand Down
3 changes: 0 additions & 3 deletions soc/arm/nxp_imx/rt6xx/Kconfig.defconfig.mimxrt685_cm33
Original file line number Diff line number Diff line change
Expand Up @@ -45,9 +45,6 @@ if MCUX_OS_TIMER
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 1000000

config SYS_CLOCK_TICKS_PER_SEC
default 1000000

endif # MCUX_OS_TIMER

if CORTEX_M_SYSTICK
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3 changes: 3 additions & 0 deletions soc/arm/nxp_imx/rt6xx/Kconfig.defconfig.series
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,9 @@ config ROM_START_OFFSET
config NUM_IRQS
default 60

config PM
select CODE_DATA_RELOCATION_SRAM

source "soc/arm/nxp_imx/rt6xx/Kconfig.defconfig.mimxrt6*"

endif # SOC_SERIES_MIMXRT6XX
14 changes: 14 additions & 0 deletions soc/arm/nxp_imx/rt6xx/power.c
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,17 @@
#include <logging/log.h>
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);

/*!< Power down all unnecessary blocks and enable RBB during deep sleep. */
#define APP_DEEPSLEEP_RUNCFG0 (SYSCTL0_PDRUNCFG0_LPOSC_PD_MASK | \
SYSCTL0_PDSLEEPCFG0_RBB_PD_MASK)
#define APP_DEEPSLEEP_RAM_APD 0xFFFFF8U
#define APP_DEEPSLEEP_RAM_PPD 0x0U
#define APP_EXCLUDE_FROM_DEEPSLEEP \
(((const uint32_t[]){APP_DEEPSLEEP_RUNCFG0, \
(SYSCTL0_PDSLEEPCFG1_FLEXSPI_SRAM_APD_MASK | \
SYSCTL0_PDSLEEPCFG1_FLEXSPI_SRAM_PPD_MASK), \
APP_DEEPSLEEP_RAM_APD, APP_DEEPSLEEP_RAM_PPD}))

/* Invoke Low Power/System Off specific Tasks */
void pm_power_state_set(struct pm_state_info info)
{
Expand All @@ -29,6 +40,9 @@ void pm_power_state_set(struct pm_state_info info)
case PM_STATE_RUNTIME_IDLE:
POWER_EnterSleep();
break;
case PM_STATE_SUSPEND_TO_IDLE:
POWER_EnterDeepSleep(APP_EXCLUDE_FROM_DEEPSLEEP);
break;
default:
LOG_DBG("Unsupported power state %u", info.state);
break;
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2 changes: 1 addition & 1 deletion west.yml
Original file line number Diff line number Diff line change
Expand Up @@ -100,7 +100,7 @@ manifest:
revision: f49bd1354616fae4093bf36e5eaee43c51a55127
path: tools/net-tools
- name: hal_nxp
revision: 27a464e4885f393dc376a53d9fc8d52078848496
revision: 0d11138724959e1162777d9206f841ccdf64348e
path: modules/hal/nxp
- name: open-amp
revision: 6010f0523cbc75f551d9256cf782f173177acdef
Expand Down