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drivers: can: STM32H7 FDCAN - WIP #35751

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drivers: can: STM32H7 FDCAN - WIP #35751

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2c73fb5
dts: arm: st: Add can, can1 to stm32h7.dtsi.
JeremyBCD May 27, 2021
b020e42
boards: arm: Add can1 to nucleo_h743/753.
JeremyBCD May 28, 2021
d1aa885
drivers: can: STM32H7 in can_mcan_reg, clock config.
JeremyBCD May 28, 2021
75962f4
WIP: Changed CONFIG_CAN_STM32FD to CONFIG_CAN_STM32FD_LITE in can_mca…
JeremyBCD Jun 4, 2021
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7 changes: 7 additions & 0 deletions boards/arm/nucleo_f429zi/nucleo_f429zi.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
zephyr,flash = &flash0;
zephyr,ccm = &ccm0;
zephyr,code-partition = &slot0_partition;
zephyr,can-primary = &can1;
};

leds {
Expand Down Expand Up @@ -54,6 +55,12 @@
};
};

&can1 {
pinctrl-0 = <&can1_rx_pd0 &can1_tx_pd1>;
bus-speed = <125000>;
status = "okay";
};

&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
Expand Down
12 changes: 12 additions & 0 deletions boards/arm/nucleo_h743zi/nucleo_h743zi.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,code-partition = &slot0_partition;
zephyr,can-primary = &can1;
};

leds {
Expand Down Expand Up @@ -124,6 +125,17 @@
status = "okay";
};

&can1 {
pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
bus-speed = <125000>;
sjw = <1>;
sample-point = <875>;
bus-speed-data = <1000000>;
sjw-data = <1>;
sample-point-data = <875>;
status = "okay";
};

/*
* WARNING:
* Possible pin conflicts:
Expand Down
12 changes: 12 additions & 0 deletions boards/arm/nucleo_h753zi/nucleo_h753zi.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
zephyr,flash = &flash0;
zephyr,dtcm = &dtcm;
zephyr,code-partition = &slot0_partition;
zephyr,can-primary = &can1;
};

leds {
Expand Down Expand Up @@ -124,6 +125,17 @@
status = "okay";
};

&can1 {
pinctrl-0 = <&fdcan1_rx_pd0 &fdcan1_tx_pd1>;
bus-speed = <125000>;
sjw = <1>;
sample-point = <875>;
bus-speed-data = <125000>;
sjw-data = <1>;
sample-point-data = <875>;
status = "okay";
};

/*
* WARNING:
* Possible pin conflicts:
Expand Down
26 changes: 22 additions & 4 deletions drivers/can/can_mcan.c
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Original file line number Diff line number Diff line change
Expand Up @@ -238,7 +238,7 @@ int can_mcan_init(const struct device *dev, const struct can_mcan_config *cfg,
(can->crel & CAN_MCAN_CREL_MON) >> CAN_MCAN_CREL_MON_POS,
(can->crel & CAN_MCAN_CREL_DAY) >> CAN_MCAN_CREL_DAY_POS);

#ifndef CONFIG_CAN_STM32FD
#ifndef CONFIG_CAN_STM32FD_LITE
can->sidfc = ((uint32_t)msg_ram->std_filt & CAN_MCAN_SIDFC_FLSSA_MSK) |
(ARRAY_SIZE(msg_ram->std_filt) << CAN_MCAN_SIDFC_LSS_POS);
can->xidfc = ((uint32_t)msg_ram->ext_filt & CAN_MCAN_XIDFC_FLESA_MSK) |
Expand Down Expand Up @@ -291,15 +291,15 @@ int can_mcan_init(const struct device *dev, const struct can_mcan_config *cfg,

#endif

#ifdef CONFIG_CAN_STM32FD
#ifdef CONFIG_CAN_STM32FD_LITE
can->rxgfc |= (CONFIG_CAN_MAX_STD_ID_FILTER << CAN_MCAN_RXGFC_LSS_POS) |
(CONFIG_CAN_MAX_EXT_ID_FILTER << CAN_MCAN_RXGFC_LSE_POS) |
(0x2 << CAN_MCAN_RXGFC_ANFS_POS) |
(0x2 << CAN_MCAN_RXGFC_ANFE_POS);
#else
can->gfc |= (0x2 << CAN_MCAN_GFC_ANFE_POS) |
(0x2 << CAN_MCAN_GFC_ANFS_POS);
#endif /* CONFIG_CAN_STM32FD */
#endif /* CONFIG_CAN_STM32FD_LITE */

if (cfg->sample_point) {
ret = can_calc_timing(dev, &timing, cfg->bus_speed,
Expand Down Expand Up @@ -356,7 +356,7 @@ int can_mcan_init(const struct device *dev, const struct can_mcan_config *cfg,
CAN_MCAN_IE_RF0N | CAN_MCAN_IE_RF1N | CAN_MCAN_IE_RF0L |
CAN_MCAN_IE_RF1L;

#ifdef CONFIG_CAN_STM32FD
#ifdef CONFIG_CAN_STM32FD_LITE
can->ils = CAN_MCAN_ILS_RXFIFO0 | CAN_MCAN_ILS_RXFIFO1;
#else
can->ils = CAN_MCAN_ILS_RF0N | CAN_MCAN_ILS_RF1N;
Expand Down Expand Up @@ -428,16 +428,20 @@ void can_mcan_line_0_isr(const struct can_mcan_config *cfg,
{
struct can_mcan_reg *can = cfg->can;

LOG_DBG("%s: %s, %d", __func__, __FILE__, __LINE__);

do {
if (can->ir & (CAN_MCAN_IR_BO | CAN_MCAN_IR_EP |
CAN_MCAN_IR_EW)) {
can->ir = CAN_MCAN_IR_BO | CAN_MCAN_IR_EP |
CAN_MCAN_IR_EW;
LOG_DBG("%s: %s: state_change, %d", __func__, __FILE__, __LINE__);
can_mcan_state_change_handler(cfg, data);
}
/* TX event FIFO new entry */
if (can->ir & CAN_MCAN_IR_TEFN) {
can->ir = CAN_MCAN_IR_TEFN;
LOG_DBG("%s: %s: CAN_MCAN_IR_TEFN, %d", __func__, __FILE__, __LINE__);
can_mcan_tc_event_handler(can, msg_ram, data);
}

Expand Down Expand Up @@ -656,16 +660,24 @@ int can_mcan_send(const struct can_mcan_config *cfg,
return CAN_TX_BUS_OFF;
}

LOG_DBG("%s: %s, %d", __func__, __FILE__, __LINE__);

ret = k_sem_take(&data->tx_sem, timeout);
if (ret != 0) {
return CAN_TIMEOUT;
}

LOG_DBG("%s: %s, %d", __func__, __FILE__, __LINE__);

__ASSERT_NO_MSG((can->txfqs & CAN_MCAN_TXFQS_TFQF) !=
CAN_MCAN_TXFQS_TFQF);

LOG_DBG("%s: %s, %d", __func__, __FILE__, __LINE__);

k_mutex_lock(&data->tx_mtx, K_FOREVER);

LOG_DBG("%s: %s, %d", __func__, __FILE__, __LINE__);

put_idx = ((can->txfqs & CAN_MCAN_TXFQS_TFQPI) >>
CAN_MCAN_TXFQS_TFQPI_POS);

Expand All @@ -689,18 +701,24 @@ int can_mcan_send(const struct can_mcan_config *cfg,
*dst = *src;
}

LOG_DBG("%s: %s, %d", __func__, __FILE__, __LINE__);

data->tx_fin_cb[put_idx] = callback;
data->tx_fin_cb_arg[put_idx] = callback_arg;

can->txbar = (1U << put_idx);

k_mutex_unlock(&data->tx_mtx);

LOG_DBG("%s: %s, %d", __func__, __FILE__, __LINE__);

if (callback == NULL) {
LOG_DBG("Waiting for TX complete");
k_sem_take(&data->tx_fin_sem[put_idx], K_FOREVER);
}

LOG_INF("%s: %s, %d! Yay!", __func__, __FILE__, __LINE__);

return CAN_TX_OK;
}

Expand Down
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