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new pinctrl API #37621
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ad60bff
ADD pinctrl-device.yaml
galak 0208ff9
api: Add pinctlr driver API
mnkp fc30824
drivers: Add pinctrl_sam driver
mnkp 71bbbd8
drivers: serial: update usart_sam driver to use new pinctrl API
mnkp c10b2dc
pinmux: mcux: Add support for ...
galak 433c841
drivers: serial: Convert uart_mcux.c to new pinctrl API
galak e3630b8
boards: arm: nxp: use driver to set uart pins
galak d81b73b
drivers: pinctrl: nrf: initial support
gmarull f3b2e29
nrf: add soc_pinctrl.h
galak 43a02a6
drivers: pinctrl: nrf: add support for uarte peripheral
gmarull 2e7026d
pinctrl: HACK pinctrl_nrf.c so it builds
galak f732d5c
drivers: serial: nrfx_uarte: add support for pinctrl
gmarull 1bb86a1
drivers: serial: NRF UARTE: changes to build with pinctrl API
galak 84d9588
boards: nrf52840dk_nrf52840: add pinctrl support for uart
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27 changes: 27 additions & 0 deletions
27
boards/arm/nrf52840dk_nrf52840/nrf52840dk_nrf52840-pinctrl.dtsi
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,27 @@ | ||
| &pinctrl { | ||
| /* UART0 */ | ||
| uart0_default: uart0_default { | ||
| pincfg = <PINCTRL_NRF(0, 6, OUT, IDISC, PN, UART_TX) | ||
| PINCTRL_NRF(0, 8, INP, ICONN, PU, UART_RX) | ||
| PINCTRL_NRF(0, 5, OUT, IDISC, PN, UART_RTS) | ||
| PINCTRL_NRF(0, 7, INP, ICONN, PU, UART_CTS)>; | ||
| }; | ||
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| uart0_sleep: uart0_sleep { | ||
| pincfg = <PINCTRL_NRF(0, 6, INP, IDISC, PN, UART_TX) | ||
| PINCTRL_NRF(0, 8, INP, IDISC, PN, UART_RX) | ||
| PINCTRL_NRF(0, 5, INP, IDISC, PN, UART_RTS) | ||
| PINCTRL_NRF(0, 7, INP, IDISC, PN, UART_CTS)>; | ||
| }; | ||
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| /* UART1 */ | ||
| uart1_default: uart1_default { | ||
| pincfg = <PINCTRL_NRF(1, 2, OUT, IDISC, PN, UART_TX) | ||
| PINCTRL_NRF(1, 1, INP, ICONN, PU, UART_RX)>; | ||
| }; | ||
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| uart1_sleep: uart1_sleep { | ||
| pincfg = <PINCTRL_NRF(1, 2, INP, IDISC, PN, UART_TX) | ||
| PINCTRL_NRF(1, 1, INP, IDISC, PN, UART_RX)>; | ||
| }; | ||
| }; |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -25,3 +25,5 @@ CONFIG_UART_CONSOLE=y | |
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| # additional board options | ||
| CONFIG_GPIO_AS_PINRESET=y | ||
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| CONFIG_PINCTRL=y | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,6 @@ | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| zephyr_sources_ifdef(CONFIG_USERSPACE pinctrl_handlers.c) | ||
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| zephyr_sources_ifdef(CONFIG_PINCTRL_SAM pinctrl_sam.c) | ||
| zephyr_library_sources_ifdef(CONFIG_PINCTRL_NRF pinctrl_nrf.c) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,21 @@ | ||
| # pinctrl configuration options | ||
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| # Copyright (c) 2021 Piotr Mienkowski | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| menuconfig PINCTRL | ||
| bool "Pin Controller driver" | ||
| help | ||
| Enable pinctrl driver. | ||
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| if PINCTRL | ||
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| config PINCTRL_SAM | ||
| def_bool y | ||
| depends on SOC_FAMILY_SAM | ||
| help | ||
| Enable Atmel SAM pinctrl driver. | ||
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| source "drivers/pinctrl/Kconfig.nrf" | ||
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| endif # PINCTRL |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,9 @@ | ||
| # Copyright (c) 2021 Nordic Semiconductor ASA | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| config PINCTRL_NRF | ||
| bool "nRF pin controller driver" | ||
| depends on SOC_FAMILY_NRF | ||
| default y | ||
| help | ||
| nRF pin controller driver |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,16 @@ | ||
| /* | ||
| * Copyright (c) 2021 Piotr Mienkowski | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| #include <syscall_handler.h> | ||
| #include <drivers/pinctrl.h> | ||
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| int z_vrfy_pinctrl_pin_configure(const pinctrl_soc_pins_t *pin_spec) | ||
| { | ||
| Z_SYSCALL_MEMORY_READ(pin_spec, sizeof(pinctrl_soc_pins_t)); | ||
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| return z_impl_pinctrl_pin_configure(pin_spec); | ||
| } | ||
| #include <syscalls/pinctrl_pin_configure_mrsh.c> |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,83 @@ | ||
| /* | ||
| * Copyright (c) 2021 Nordic Semiconductor ASA | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| #include <drivers/pinctrl.h> | ||
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| #include <hal/nrf_gpio.h> | ||
| #if CONFIG_NRF_UARTE_PERIPHERAL | ||
| #include <hal/nrf_uarte.h> | ||
| #endif | ||
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| #if 0 && CONFIG_NRF_UARTE_PERIPHERAL | ||
| static void pinctrl_nrf_uarte_config(NRF_UARTE_Type *uarte, | ||
| const uint32_t *pincfgs, | ||
| size_t pincfgs_cnt) | ||
| { | ||
| uint32_t pseltxd = NRF_UARTE_PSEL_DISCONNECTED; | ||
| uint32_t pselrxd = NRF_UARTE_PSEL_DISCONNECTED; | ||
| uint32_t pselrts = NRF_UARTE_PSEL_DISCONNECTED; | ||
| uint32_t pselcts = NRF_UARTE_PSEL_DISCONNECTED; | ||
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| for (size_t i = 0U; i < pincfgs_cnt; i++) { | ||
| switch (PINCTRL_NRF_GET_FUN(pincfgs[i])) { | ||
| case PINCTRL_NRF_FUN_UART_TX: | ||
| pseltxd = PINCTRL_NRF_GET_PIN(pincfgs[i]); | ||
| break; | ||
| case PINCTRL_NRF_FUN_UART_RX: | ||
| pselrxd = PINCTRL_NRF_GET_PIN(pincfgs[i]); | ||
| break; | ||
| case PINCTRL_NRF_FUN_UART_RTS: | ||
| pselrts = PINCTRL_NRF_GET_PIN(pincfgs[i]); | ||
| break; | ||
| case PINCTRL_NRF_FUN_UART_CTS: | ||
| pselcts = PINCTRL_NRF_GET_PIN(pincfgs[i]); | ||
| break; | ||
| default: | ||
| break; | ||
| } | ||
| } | ||
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| nrf_uarte_txrx_pins_set(uarte, pseltxd, pselrxd); | ||
| nrf_uarte_hwfc_pins_set(uarte, pselrts, pselcts); | ||
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| nrf_gpio_pin_write(pseltxd, 1); | ||
| } | ||
| #endif | ||
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| int z_impl_pinctrl_pin_configure(const pinctrl_soc_pins_t *pin_spec) | ||
| { | ||
| #if 0 | ||
| /* configure peripheral pin selection */ | ||
| switch (dev->pinctrl->reg) { | ||
| #if CONFIG_NRF_UARTE_PERIPHERAL | ||
| #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) | ||
| case DT_REG_ADDR(DT_NODELABEL(uart0)): | ||
| #endif | ||
| #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) | ||
| case DT_REG_ADDR(DT_NODELABEL(uart1)): | ||
| #endif | ||
| pinctrl_nrf_uarte_config((NRF_UARTE_Type *)dev->pinctrl->reg, | ||
| state->pincfgs, | ||
| state->pincfgs_cnt); | ||
| break; | ||
| #endif | ||
| default: | ||
| return -ENOTSUP; | ||
| } | ||
|
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| /* configure pins GPIO settings */ | ||
| for (size_t i = 0U; i < state->pincfgs_cnt; i++) { | ||
| nrf_gpio_cfg(PINCTRL_NRF_GET_PIN(state->pincfgs[i]), | ||
| PINCTRL_NRF_GET_DIR(state->pincfgs[i]), | ||
| PINCTRL_NRF_GET_INP(state->pincfgs[i]), | ||
| PINCTRL_NRF_GET_PULL(state->pincfgs[i]), | ||
| NRF_GPIO_PIN_S0S1, | ||
| NRF_GPIO_PIN_NOSENSE); | ||
| } | ||
| #endif | ||
|
|
||
| return 0; | ||
| } | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,15 @@ | ||
| /* | ||
| * Copyright (c) 2021 Piotr Mienkowski | ||
| * | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
|
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| #include <drivers/pinctrl.h> | ||
| #include <soc.h> | ||
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| int z_impl_pinctrl_pin_configure(const pinctrl_soc_pins_t *pin_spec) | ||
| { | ||
| soc_gpio_configure((const struct soc_gpio_pin *)pin_spec); | ||
|
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| return 0; | ||
| } |
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In the case of Nordic (see pinctrl->reg) and STM32F1 (see uint32_t base) the
pinctrl_soc_pins_twill not be enough to configure a pin, since knowledge about the peripheral is also required. In case of Nordic, doing the configuration at once per peripheral is more efficient (due to the required "switch/case"). In case of STM32F1 I'm not sure if it would be possible, @erwango ?There was a problem hiding this comment.
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True. Thanks for raising it.
Configuring all pins at once (using an array) would also save some operations in F1 case
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than whatever reg is needed should be placed in
pinctrl_soc_pins_tThere was a problem hiding this comment.
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regis not per-pin, but per pin set.pinctrl_pin_configureconfigures a single pin.There was a problem hiding this comment.
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Not sure I follow that comment. If the
regvaries between 2 pins than its effectively per-pin.There was a problem hiding this comment.
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regdoes not vary between 2 pins of the same peripheral.There was a problem hiding this comment.
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For F1 case (and NRF as I understand) peripheral
regis required for proper pin configuration.As a consequence, all pins configured for a peripheral have same
regvalue.There was a problem hiding this comment.
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gotcha. So I think we should add
void *foruser_data. Suggestions on what to call ituser_datadoesn't seem right.There was a problem hiding this comment.
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Understood, how will this work for the runtime case? The user will end having to know what "reg" value to pass?
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I have updated #37572 with a PoC (including other changes)