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riscv: Introduce Bouffalo Lab SoC and dt_bl10_devkit #37686
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22cf8d6
riscv: linker.ld: Fix undefined reference linker error
nandojve f420690
west: Introduce hal bouffalo lab
nandojve 531f50f
dts: riscv: bouffalolab: Add bl6 series cpu
nandojve 52dad4f
soc: riscv: bouffalolab: Add bl6 series cpu
nandojve e3dd54c
drivers: timer: Enable mtimer support for bflb cpu
nandojve db422fd
drivers: pinctrl: bouffalolab: Add bflb pinctrl driver
nandojve 3b68a0f
drivers: serial: bouffalolab: Add bflb serial driver
nandojve b18af6e
scripts: runner: Introduce blflash runner
nandojve 6bfee9c
boards: riscv: Introduce dt_bl10_devkit
nandojve 6896bf9
CODEOWNERS: Add nandojve for bouffalolab
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| # Bouffalo Lab BL602 DevKit | ||
| # | ||
| # Copyright (c) 2021 ATL Electronics | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| config BOARD_DT_BL10_DEVKIT | ||
| bool "2.4GHz Wi-Fi and BLE coexistence Module Development Kit" | ||
| depends on SOC_PART_NUMBER_BL602C20Q2I |
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| # Bouffalo Lab BL602 DevKit | ||
| # | ||
| # Copyright (c) 2021 ATL Electronics | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| if BOARD_DT_BL10_DEVKIT | ||
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| config BOARD | ||
| default "dt_bl10_devkit" | ||
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| endif # BOARD_DT_BL10_DEVKIT |
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| # Copyright (c) 2021, ATL Electronics | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| include(${ZEPHYR_BASE}/boards/common/blflash.board.cmake) |
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| .. _dt_bl10_devkit: | ||
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| BL602 Development Board | ||
| ####################### | ||
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| Overview | ||
| ******** | ||
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| BL602/BL604 is a Wi-Fi+BLE chipset introduced by Bouffalo Lab, which is used | ||
| for low power consumption and high performance application development. The | ||
| wireless subsystem includes 2.4G radio, Wi-Fi 802.11b/g/n and BLE 5.0 | ||
| baseband/MAC design. The microcontroller subsystem includes a 32-bit RISC CPU | ||
| with low power consumption, cache and memory. The power management unit | ||
| controls the low power consumption mode. In addition, it also supports | ||
| various security features. The external interfaces include SDIO, SPI, UART, | ||
| I2C, IR remote, PWM, ADC, DAC, PIR and GPIO. | ||
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| The BL602 Development Board features a SiFive E24 32 bit RISC-V CPU with FPU, | ||
| it supports High Frequency clock up to 192Mhz, have 128k ROM, 276kB RAM, | ||
| 2.4 GHz WIFI 1T1R mode, support 20 MHz, data rate up to 72.2 Mbps, BLE 5.0 | ||
| with 2MB phy. It is a secure MCU which supports Secure boot, ECC-256 signed | ||
| image, QSPI/SPI Flash On-The-Fly AES Decryption and PKA (Public Key | ||
| Accelerator). | ||
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| .. image:: img/dt_bl10_devkit.jpg | ||
| :width: 450px | ||
| :align: center | ||
| :alt: dt_bl10_devkit | ||
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| Hardware | ||
| ******** | ||
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| For more information about the Bouffalo Lab BL-602 MCU: | ||
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| - `Bouffalo Lab BL602 MCU Website`_ | ||
| - `Bouffalo Lab BL602 MCU Datasheet`_ | ||
| - `Bouffalo Lab Development Zone`_ | ||
| - `dt_bl10_devkit Schematic`_ | ||
| - `Doctors of Intelligence & Technology (www.doiting.com)`_ | ||
| - `The RISC-V BL602 Book`_ | ||
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| Supported Features | ||
| ================== | ||
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| The board configuration supports the following hardware features: | ||
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| +-----------+------------+-----------------------+ | ||
| | Interface | Controller | Driver/Component | | ||
| +===========+============+=======================+ | ||
| | MTIMER | on-chip | RISC-V Machine Timer | | ||
| +-----------+------------+-----------------------+ | ||
| | PINCTRL | on-chip | pin muxing | | ||
| +-----------+------------+-----------------------+ | ||
| | UART | on-chip | serial port-polling | | ||
| +-----------+------------+-----------------------+ | ||
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| The default configurations can be found in the Kconfig | ||
| :zephyr_file:`boards/risc/dt_bl10_devkit/dt_bl10_devkit_defconfig`. | ||
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| System Clock | ||
| ============ | ||
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| The BL602 Development Board is configured to run at max speed (192MHz). | ||
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| Serial Port | ||
| =========== | ||
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| The dt_bl10_devkit_ uses UART0 as default serial port. It is connected to | ||
| USB Serial converter and port is used for both program and console. | ||
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| Programming and Debugging | ||
| ************************* | ||
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| BL Flash tool | ||
| ============= | ||
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| The BL-602 have a ROM bootloader that allows user flash device by serial port. | ||
| There are some tools available at internet and this will describe one of them. | ||
| The below guide was created based on RISC-V BL602 Book, chapter 3 | ||
| `Flashing Firmware to BL602`_. | ||
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| #. `Install Rustup`_ | ||
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| #. Clone blflash rust version | ||
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| .. code-block:: console | ||
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| $ git clone --recursive https://github.com/spacemeowx2/blflash | ||
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| #. Build blflash | ||
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| .. code-block:: console | ||
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| $ cd blflash | ||
| $ cargo build --release | ||
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| #. Install blflash. The recommended use is copy to home folder | ||
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| .. code-block:: console | ||
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| $ cp blflash ~/bin/ | ||
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| #. Test | ||
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| .. code-block:: console | ||
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| $ blflash -V | ||
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| It will print blflash version | ||
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| .. code-block:: console | ||
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| $ blflash 0.3.3 | ||
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| Samples | ||
| ======= | ||
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| #. Build the Zephyr kernel and the :ref:`hello_world` sample application: | ||
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| .. zephyr-app-commands:: | ||
| :zephyr-app: samples/hello_world | ||
| :board: dt_bl10_devkit | ||
| :goals: build | ||
| :compact: | ||
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| #. To flash an image using blflash runner: | ||
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| #. Press D8 button | ||
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| #. Press and release EN button | ||
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| #. Release D8 button | ||
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| .. code-block:: console | ||
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| west flash -r blflash | ||
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| #. Run your favorite terminal program to listen for output. Under Linux the | ||
| terminal should be :code:`/dev/ttyUSB0`. For example: | ||
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| .. code-block:: console | ||
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| $ minicom -D /dev/ttyUSB0 -o | ||
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| The -o option tells minicom not to send the modem initialization | ||
| string. Connection should be configured as follows: | ||
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| - Speed: 115200 | ||
| - Data: 8 bits | ||
| - Parity: None | ||
| - Stop bits: 1 | ||
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| Then, press and release EN button | ||
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| .. code-block:: console | ||
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| *** Booting Zephyr OS build zephyr-v2.6.0-1729-g22140c728537 *** | ||
| Hello World! dt_bl10_devkit | ||
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| Congratulations, you have `dt_bl10_devkit`_ configured and running Zephyr. | ||
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| .. _Bouffalo Lab BL602 MCU Website: | ||
| https://www.bouffalolab.com/bl602 | ||
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| .. _Bouffalo Lab BL602 MCU Datasheet: | ||
| https://github.com/bouffalolab/bl_docs/tree/main/BL602_DS/en | ||
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| .. _Bouffalo Lab Development Zone: | ||
| https://dev.bouffalolab.com/home?id=guest | ||
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| .. _dt_bl10_devkit Schematic: | ||
| https://github.com/SmartArduino/Doiting_BL/blob/master/board/DT-BL10%20User%20Mannual.pdf | ||
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| .. _Doctors of Intelligence & Technology (www.doiting.com): | ||
| https://www.doiting.com | ||
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| .. _Install Rustup: | ||
| https://rustup.rs/ | ||
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| .. _The RISC-V BL602 Book: | ||
| https://lupyuen.github.io/articles/book | ||
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| .. _Flashing Firmware to BL602: | ||
| https://lupyuen.github.io/articles/book#flashing-firmware-to-bl602 |
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| /* | ||
| * Copyright (c) 2021, ATL Electronics | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| #include <bouffalolab/bl602.dtsi> | ||
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| &pinctrl { | ||
| uart0_default: uart0_default { | ||
| pins1 { | ||
| bflb,pins = <BFLB_PIN(uart0, 7)>, | ||
| <BFLB_PIN(uart0, 16)>; | ||
| bflb,signals = <BFLB_SIG_UART_RXD>, | ||
| <BFLB_SIG_UART_TXD>; | ||
| bias-pull-up; | ||
| input-schmitt-enable; | ||
| }; | ||
| }; | ||
| uart0_sleep: uart0_sleep { | ||
| pins1 { | ||
| bflb,pins = <BFLB_PIN(uart0, 7)>, | ||
| <BFLB_PIN(uart0, 16)>; | ||
| bflb,signals = <BFLB_SIG_UART_RXD>, | ||
| <BFLB_SIG_UART_TXD>; | ||
| bias-high-impedance; | ||
| }; | ||
| }; | ||
| }; |
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| /* | ||
| * Copyright (c) 2021, ATL Electronics | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| /dts-v1/; | ||
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| #include "dt_bl10_devkit-pinctrl.dtsi" | ||
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| / { | ||
| model = "2.4GHz Wi-Fi and BLE coexistence Module Development Kit"; | ||
| compatible = "bflb,bl602"; | ||
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| chosen { | ||
| zephyr,flash = &flash0; | ||
| zephyr,itcm = &itcm; | ||
| zephyr,dtcm = &dtcm; | ||
| zephyr,sram = &sram0; | ||
| zephyr,console = &uart0; | ||
| zephyr,shell-uart = &uart0; | ||
| }; | ||
| }; | ||
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| &cpu0 { | ||
| clock-frequency = <160000000>; | ||
| }; | ||
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| &spi1 { | ||
| #address-cells = <1>; | ||
| #size-cells = <0>; | ||
| reg = <0x4000b000 0x1000 0x23000000 0xc00000>; | ||
| flash0: flash@0 { | ||
| compatible = "issi,is25lp128", "jedec,spi-nor"; | ||
| size = <134217728>; | ||
| label = "FLASH0"; | ||
| jedec-id = [96 60 18]; | ||
| reg = <0>; | ||
| // Dummy entry | ||
| spi-max-frequency = <0>; | ||
| }; | ||
| }; | ||
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| &uart0 { | ||
| status = "okay"; | ||
| current-speed = <115200>; | ||
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| pinctrl-0 = <&uart0_default>; | ||
| pinctrl-1 = <&uart0_sleep>; | ||
| pinctrl-names = "default", "sleep"; | ||
| }; | ||
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| # Copyright (c) 2021, ATL Electronics | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| identifier: dt_bl10_devkit | ||
| name: 2.4GHz Wi-Fi and BLE coexistence Module Development Kit | ||
| type: mcu | ||
| arch: riscv32 | ||
| ram: 64 | ||
| toolchain: | ||
| - zephyr | ||
| testing: | ||
| ignore_tags: | ||
| - net | ||
| - bluetooth |
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| # Copyright (c) 2021, ATL Electronics | ||
| # SPDX-License-Identifier: Apache-2.0 | ||
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| CONFIG_SOC_SERIES_BL6=y | ||
| CONFIG_SOC_PART_NUMBER_BL602C20Q2I=y | ||
| CONFIG_BOARD_DT_BL10_DEVKIT=y | ||
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| CONFIG_CONSOLE=y | ||
| CONFIG_UART_CONSOLE=y | ||
| CONFIG_SERIAL=y |
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What's going on here? This does not look correct. Is it just for draft?
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Hi @mbolivar-nordic , all this PR still marked as draft. I only asked to @gmarull some tips about pinctrl because it is a new API and this SoC have some odd parts.