Add initial pinctrl support for NXP kinetis

drivers/pinctrl/CMakeLists.txt

@@ -3,3 +3,4 @@
 
 zephyr_library()
 zephyr_library_sources(common.c)
+zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_MCUX pinctrl_nxp_mcux.c)

drivers/pinctrl/Kconfig

@@ -29,4 +29,11 @@ config PINCTRL_DYNAMIC
 	  runtime. This can be useful, for example, to change the pins assigned to a
 	  peripheral at early boot stages depending on a certain input.
 
+config PINCTRL_NXP_MCUX
+	bool "Pin controller driver for NXP Kinetis MCUs"
+	depends on SOC_FAMILY_KINETIS
+	default y
+	help
+	  Enable pin controller driver for NXP Kinetis MCUs
+
 endif # PINCTRL

drivers/pinctrl/pinctrl_nxp_mcux.c

@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2021 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <drivers/pinctrl.h>
+
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
+			   uintptr_t reg)
+{
+	for (uint8_t i = 0U; i < pin_cnt; i++) {
+		pins[i].port_reg->PCR[pins[i].pin] = pins[i].mux;
+	}
+
+	return 0;
+}

dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml

@@ -5,6 +5,11 @@ compatible: "nxp,kinetis-pinmux"
 include:
   - name: base.yaml
   - name: pincfg-node.yaml
+    child-binding:
+      property-allowlist:
+        - bias-pull-down
+        - bias-pull-up
+        - drive-open-drain
 
 properties:
     reg:

soc/arm/nxp_kinetis/CMakeLists.txt

@@ -4,6 +4,9 @@ zephyr_sources_ifdef(CONFIG_KINETIS_FLASH_CONFIG	flash_configuration.c)
 
 add_subdirectory(${SOC_SERIES})
 
+# This is for access to pinmux macros
+zephyr_include_directories(common)
+
 zephyr_linker_sources_ifdef(CONFIG_KINETIS_FLASH_CONFIG
   ROM_START
   SORT_KEY ${CONFIG_KINETIS_FLASH_CONFIG_OFFSET}

soc/arm/nxp_kinetis/Kconfig

@@ -5,6 +5,7 @@
 config SOC_FAMILY_KINETIS
 	bool
 	select HAS_SEGGER_RTT
+	select PINCTRL
 
 if SOC_FAMILY_KINETIS
 

soc/arm/nxp_kinetis/common/pinctrl_soc.h

@@ -0,0 +1,76 @@
+/*
+ * Copyright (c) 2021 Linaro Limited.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/**
+ * @file
+ * Public APIs for pin control drivers
+ */
+
+#ifndef ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_
+#define ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_
+
+/**
+ * @brief Pin Controller Interface (NXP Kinetis)
+ * @defgroup pinctrl_interface_nxp_kinetis Pin Controller Interface
+ * @ingroup pinctrl_interface
+ * @{
+ */
+
+#include <devicetree.h>
+#include <zephyr/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @cond INTERNAL_HIDDEN */
+
+/** Type for NXP Kinetis pin. */
+typedef struct pinctrl_soc_pin {
+	PORT_Type *port_reg;
+	uint8_t pin;
+	uint16_t mux;
+} pinctrl_soc_pin_t;
+
+#define PINCTRL_SOC_PINS_ELEM_INIT(node_id)							\
+{												\
+	.port_reg = (PORT_Type *)DT_REG_ADDR(DT_PARENT(node_id)),				\
+	.pin = DT_PROP_BY_IDX(node_id, nxp_kinetis_port_pins, 0),				\
+	.mux = PORT_PCR_MUX(DT_PROP_BY_IDX(node_id, nxp_kinetis_port_pins, 1)) |		\
+		(DT_PROP(node_id, bias_pull_up) & (PORT_PCR_PE_MASK | PORT_PCR_PS_MASK)) |	\
+		(DT_PROP(node_id, bias_pull_down) & PORT_PCR_PS_MASK) |				\
+		(DT_PROP(node_id, drive_open_drain) & PORT_PCR_ODE_MASK), 			\
+},
+
+/**
+ * @brief Utility macro to initialize each pin.
+ *
+ * @param node_id Node identifier.
+ * @param state_prop State property name.
+ * @param idx State property entry index.
+ */
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx)		       \
+	PINCTRL_SOC_PINS_ELEM_INIT(DT_PROP_BY_IDX(node_id, state_prop, idx))
+
+/**
+ * @brief Utility macro to initialize state pins contained in a given property.
+ *
+ * @param node_id Node identifier.
+ * @param prop Property name describing state pins.
+ */
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)			       \
+	{DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT)}
+
+/** @endcond */
+
+#ifdef __cplusplus
+}
+#endif
+
+/**
+ * @}
+ */
+
+#endif /* ZEPHYR_SOC_ARM_NXP_KINETIS_COMMON_PINCTRL_SOC_H_ */