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drivers: ssd16xx: Imlement better partial refresh #48163

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Merged
merged 6 commits into from
May 11, 2023
Merged

drivers: ssd16xx: Imlement better partial refresh #48163

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7e113d8
drivers: ssd16xx: Use device-specific compatibles
andysan Jul 16, 2022
77857b3
drivers: ssd16xx: Update DT bindings for multiple profiles
andysan Jul 12, 2022
8ebc47e
drivers: ssd16xx: Add support for partial refresh profiles
andysan Jul 21, 2022
b47fa1f
drivers: ssd16xx: Clean up ssd16xx_clear_cntlr_mem
andysan Jul 22, 2022
5734ae6
drivers: ssd16xx: Add support for the ssd1680
andysan Jul 22, 2022
3eefe98
drivers: ssd16xx: Remove SCREEN_INFO_DOUBLE_BUFFER cap
andysan Jul 22, 2022
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52 changes: 31 additions & 21 deletions boards/arm/reel_board/reel_board.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -57,33 +57,43 @@
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
ssd16xx: ssd16xxfb@0 {
compatible = "gooddisplay,gdeh0213b1", "solomon,ssd1673", "solomon,ssd16xxfb";
compatible = "gooddisplay,gdeh0213b1", "solomon,ssd1673";
spi-max-frequency = <4000000>;
reg = <0>;
width = <250>;
height = <122>;
pp-width-bits = <8>;
pp-height-bits = <8>;
reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
busy-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
gdv = [10 0a];
sdv = [19];
vcom = <0xa8>;
border-waveform = <0x71>;
dummy-line = <0x1a>;
gate-line-width = <0x08>;
lut-initial = [
22 55 AA 55 AA 55 AA 11
00 00 00 00 00 00 00 00
1E 1E 1E 1E 1E 1E 1E 1E
01 00 00 00 00
];
lut-default = [
18 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
0F 01 00 00 00 00 00 00
00 00 00 00 00
];

full {
gdv = [10 0a];
sdv = [19];
vcom = <0xa8>;
border-waveform = <0x71>;
dummy-line = <0x1a>;
gate-line-width = <0x08>;
lut = [
22 55 AA 55 AA 55 AA 11
00 00 00 00 00 00 00 00
1E 1E 1E 1E 1E 1E 1E 1E
01 00 00 00 00
];
};

partial {
gdv = [10 0a];
sdv = [19];
vcom = <0xa8>;
border-waveform = <0x71>;
dummy-line = <0x1a>;
gate-line-width = <0x08>;
lut = [
18 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
0F 01 00 00 00 00 00 00
00 00 00 00 00
];
};
};
};
125 changes: 67 additions & 58 deletions boards/arm/reel_board/reel_board_v2.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -40,71 +40,80 @@
pinctrl-1 = <&spi1_sleep>;
pinctrl-names = "default", "sleep";
ssd16xx: ssd16xxfb@0 {
compatible = "gooddisplay,gdeh0213b72", "solomon,ssd1675a", "solomon,ssd16xxfb";
compatible = "gooddisplay,gdeh0213b72", "solomon,ssd1675a";
spi-max-frequency = <4000000>;
reg = <0>;
width = <250>;
height = <122>;
pp-width-bits = <8>;
pp-height-bits = <16>;
reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
dc-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
busy-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
gdv = [15];
sdv = [41 a8 32];
vcom = <0x26>;
border-waveform = <0x03>;
dummy-line = <0x30>;
gate-line-width = <0x0a>;
lut-initial = [
/*
* Waveform Composition
*
* There are 7 Voltage Source (VS) Level groups
* n = {0,1,2...6}, each group contains
* 4 phases x = {A,B,C,D}.
* 2 bits represent the voltage in a phase:
* 00 – VSS, 01 – VSH1, 10 – VSL, 11 - VSH2
*
* For example 0x80 represents sequence VSL-VSS-VSS-VSS,
*/
80 60 40 00 00 00 00 /* LUT0: BB: VS 0..6 */
10 60 20 00 00 00 00 /* LUT1: BW: VS 0..6 */
80 60 40 00 00 00 00 /* LUT2: WB: VS 0..6 */
10 60 20 00 00 00 00 /* LUT3: WW: VS 0..6 */
00 00 00 00 00 00 00 /* LUT4: VCOM: VS 0..6 */
/*
* TPnx determines the length of each phase,
* and RPn repeat count of a sequence.
* TPnA, TPnB, TPnC, TPnD, RPn
*
* For example TP0A=3, TP0B=3, and RP0=2:
* VS sequence : VSL-VSS-VSS-VSS
* number of Gate Pulses (length) : 3 3 0 0
* repeat count : 2
*/
03 03 00 00 02 /* TP0A TP0B TP0C TP0D RP0 */
09 09 00 00 02 /* TP1A TP1B TP1C TP1D RP1 */
03 03 00 00 02 /* TP2A TP2B TP2C TP2D RP2 */
00 00 00 00 00 /* TP3A TP3B TP3C TP3D RP3 */
00 00 00 00 00 /* TP4A TP4B TP4C TP4D RP4 */
00 00 00 00 00 /* TP5A TP5B TP5C TP5D RP5 */
00 00 00 00 00 /* TP6A TP6B TP6C TP6D RP6 */
];

lut-default = [
00 00 00 00 00 00 00 /* LUT0: BB: VS0..6 */
80 00 00 00 00 00 00 /* LUT1: BW: VS0..6 */
40 00 00 00 00 00 00 /* LUT2: WB: VS0..6 */
80 00 00 00 00 00 00 /* LUT3: WW: VS0..6 */
00 00 00 00 00 00 00 /* LUT4: VCOM: VS0..6 */
0A 00 00 00 04 /* TP0A TP0B TP0C TP0D RP0 */
00 00 00 00 00 /* TP1A TP1B TP1C TP1D RP1 */
00 00 00 00 00 /* TP2A TP2B TP2C TP2D RP2 */
00 00 00 00 00 /* TP3A TP3B TP3C TP3D RP3 */
00 00 00 00 00 /* TP4A TP4B TP4C TP4D RP4 */
00 00 00 00 00 /* TP5A TP5B TP5C TP5D RP5 */
00 00 00 00 00 /* TP6A TP6B TP6C TP6D RP6 */
];
full {
gdv = [15];
sdv = [41 a8 32];
vcom = <0x26>;
border-waveform = <0x03>;
dummy-line = <0x30>;
gate-line-width = <0x0a>;
lut = [
/*
* Waveform Composition
*
* There are 7 Voltage Source (VS) Level groups
* n = {0,1,2...6}, each group contains
* 4 phases x = {A,B,C,D}.
* 2 bits represent the voltage in a phase:
* 00 – VSS, 01 – VSH1, 10 – VSL, 11 - VSH2
*
* For example 0x80 represents sequence VSL-VSS-VSS-VSS,
*/
80 60 40 00 00 00 00 /* LUT0: BB: VS 0..6 */
10 60 20 00 00 00 00 /* LUT1: BW: VS 0..6 */
80 60 40 00 00 00 00 /* LUT2: WB: VS 0..6 */
10 60 20 00 00 00 00 /* LUT3: WW: VS 0..6 */
00 00 00 00 00 00 00 /* LUT4: VCOM: VS 0..6 */
/*
* TPnx determines the length of each phase,
* and RPn repeat count of a sequence.
* TPnA, TPnB, TPnC, TPnD, RPn
*
* For example TP0A=3, TP0B=3, and RP0=2:
* VS sequence : VSL-VSS-VSS-VSS
* number of Gate Pulses (length) : 3 3 0 0
* repeat count : 2
*/
03 03 00 00 02 /* TP0A TP0B TP0C TP0D RP0 */
09 09 00 00 02 /* TP1A TP1B TP1C TP1D RP1 */
03 03 00 00 02 /* TP2A TP2B TP2C TP2D RP2 */
00 00 00 00 00 /* TP3A TP3B TP3C TP3D RP3 */
00 00 00 00 00 /* TP4A TP4B TP4C TP4D RP4 */
00 00 00 00 00 /* TP5A TP5B TP5C TP5D RP5 */
00 00 00 00 00 /* TP6A TP6B TP6C TP6D RP6 */
];
};

partial {
gdv = [15];
sdv = [41 a8 32];
vcom = <0x26>;
border-waveform = <0x01>;
dummy-line = <0x30>;
gate-line-width = <0x0a>;
lut = [
00 00 00 00 00 00 00 /* LUT0: BB: VS0..6 */
80 00 00 00 00 00 00 /* LUT1: BW: VS0..6 */
40 00 00 00 00 00 00 /* LUT2: WB: VS0..6 */
80 00 00 00 00 00 00 /* LUT3: WW: VS0..6 */
00 00 00 00 00 00 00 /* LUT4: VCOM: VS0..6 */
0A 00 00 00 04 /* TP0A TP0B TP0C TP0D RP0 */
00 00 00 00 00 /* TP1A TP1B TP1C TP1D RP1 */
00 00 00 00 00 /* TP2A TP2B TP2C TP2D RP2 */
00 00 00 00 00 /* TP3A TP3B TP3C TP3D RP3 */
00 00 00 00 00 /* TP4A TP4B TP4C TP4D RP4 */
00 00 00 00 00 /* TP5A TP5B TP5C TP5D RP5 */
00 00 00 00 00 /* TP6A TP6B TP6C TP6D RP6 */
];
};
};
};
14 changes: 10 additions & 4 deletions boards/shields/waveshare_epaper/waveshare_epaper_gdeh0154a07.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -14,17 +14,23 @@

&arduino_spi {
ssd16xx_waveshare_epaper_gdeh0154a07: ssd16xxfb@0 {
compatible = "gooddisplay,gdeh0154a07", "solomon,ssd1681", "solomon,ssd16xxfb";
compatible = "gooddisplay,gdeh0154a07", "solomon,ssd1681";
spi-max-frequency = <4000000>;
reg = <0>;
width = <200>;
height = <200>;
pp-width-bits = <8>;
pp-height-bits = <16>;
dc-gpios = <&arduino_header 15 GPIO_ACTIVE_LOW>; /* D9 */
reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>; /* D8 */
busy-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>; /* D7 */
border-waveform = <0x3c>;

tssv = <0x80>;

full {
border-waveform = <0x05>;
};

partial {
border-waveform = <0x3c>;
};
};
};
52 changes: 31 additions & 21 deletions boards/shields/waveshare_epaper/waveshare_epaper_gdeh0213b1.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -14,33 +14,43 @@

&arduino_spi {
ssd16xx_waveshare_epaper_gdeh0213b1: ssd16xxfb@0 {
compatible = "gooddisplay,gdeh0213b1", "solomon,ssd1673", "solomon,ssd16xxfb";
compatible = "gooddisplay,gdeh0213b1", "solomon,ssd1673";
spi-max-frequency = <4000000>;
reg = <0>;
width = <250>;
height = <120>;
pp-width-bits = <8>;
pp-height-bits = <8>;
dc-gpios = <&arduino_header 15 GPIO_ACTIVE_LOW>; /* D9 */
reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>; /* D8 */
busy-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>; /* D7 */
gdv = [10 0a];
sdv = [19];
vcom = <0xa8>;
border-waveform = <0x71>;
dummy-line = <0x1a>;
gate-line-width = <0x08>;
lut-initial = [
22 55 AA 55 AA 55 AA 11
00 00 00 00 00 00 00 00
1E 1E 1E 1E 1E 1E 1E 1E
01 00 00 00 00
];
lut-default = [
18 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
0F 01 00 00 00 00 00 00
00 00 00 00 00
];

full {
gdv = [10 0a];
sdv = [19];
vcom = <0xa8>;
border-waveform = <0x71>;
dummy-line = <0x1a>;
gate-line-width = <0x08>;
lut = [
22 55 AA 55 AA 55 AA 11
00 00 00 00 00 00 00 00
1E 1E 1E 1E 1E 1E 1E 1E
01 00 00 00 00
];
};

partial {
gdv = [10 0a];
sdv = [19];
vcom = <0xa8>;
border-waveform = <0x71>;
dummy-line = <0x1a>;
gate-line-width = <0x08>;
lut = [
18 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
0F 01 00 00 00 00 00 00
00 00 00 00 00
];
};
};
};
83 changes: 46 additions & 37 deletions boards/shields/waveshare_epaper/waveshare_epaper_gdeh0213b72.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -14,50 +14,59 @@

&arduino_spi {
ssd16xx_waveshare_epaper_gdeh0213b72: ssd16xxfb@0 {
compatible = "gooddisplay,gdeh0213b72", "solomon,ssd1675a", "solomon,ssd16xxfb";
compatible = "gooddisplay,gdeh0213b72", "solomon,ssd1675a";
spi-max-frequency = <4000000>;
reg = <0>;
width = <250>;
height = <120>;
pp-width-bits = <8>;
pp-height-bits = <16>;
dc-gpios = <&arduino_header 15 GPIO_ACTIVE_LOW>; /* D9 */
reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>; /* D8 */
busy-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>; /* D7 */
gdv = [15];
sdv = [41 a8 32];
vcom = <0x26>;
border-waveform = <0x03>;
dummy-line = <0x30>;
gate-line-width = <0x0a>;
lut-initial = [
80 60 40 00 00 00 00
10 60 20 00 00 00 00
80 60 40 00 00 00 00
10 60 20 00 00 00 00
00 00 00 00 00 00 00
03 03 00 00 02
09 09 00 00 02
03 03 00 00 02
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
];

lut-default = [
00 00 00 00 00 00 00
80 00 00 00 00 00 00
40 00 00 00 00 00 00
80 00 00 00 00 00 00
00 00 00 00 00 00 00
0A 00 00 00 04
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
];
full {
gdv = [15];
sdv = [41 a8 32];
vcom = <0x55>;
border-waveform = <0x03>;
dummy-line = <0x30>;
gate-line-width = <0x0a>;
lut = [
80 60 40 00 00 00 00
10 60 20 00 00 00 00
80 60 40 00 00 00 00
10 60 20 00 00 00 00
00 00 00 00 00 00 00
03 03 00 00 02
09 09 00 00 02
03 03 00 00 02
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
];
};

partial {
gdv = [15];
sdv = [41 a8 32];
vcom = <0x26>;
border-waveform = <0x01>;
dummy-line = <0x30>;
gate-line-width = <0x0a>;
lut = [
00 00 00 00 00 00 00
80 00 00 00 00 00 00
40 00 00 00 00 00 00
80 00 00 00 00 00 00
00 00 00 00 00 00 00
0A 00 00 00 04
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
00 00 00 00 00
];
};
};
};
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