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Merged
merged 5 commits into from
Apr 24, 2023
Merged

tests/drivers/counter/counter_basic_api for rtc and timer counters #56466

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86592a5
drivers: counter: stm32 timer counter driver LL prototype
FRASTM Mar 27, 2023
8ac5e31
drivers: clock control: stm32f4, stm32f7 driver requires LL_RCC
FRASTM Mar 27, 2023
08bf183
dts: arm: st: stm32 timer node has counter capability for each timer
FRASTM Apr 3, 2023
865b377
boards: arm: stm32 boards with counter capability
FRASTM Apr 4, 2023
a974a8c
tests: drivers: counter running on stm32 timer-counter instances
FRASTM Mar 27, 2023
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1 change: 1 addition & 0 deletions boards/arm/b_u585i_iot02a/b_u585i_iot02a.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -21,3 +21,4 @@ supported:
- nvs
- backup_sram
- pwm
- counter
1 change: 1 addition & 0 deletions boards/arm/disco_l475_iot1/disco_l475_iot1.yaml
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Expand Up @@ -14,6 +14,7 @@ supported:
- lps22hb
- lsm6dsl
- pwm
- counter
- gpio
- ble
- spi
Expand Down
1 change: 1 addition & 0 deletions boards/arm/nucleo_l073rz/nucleo_l073rz.yaml
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Expand Up @@ -19,5 +19,6 @@ supported:
- adc
- dac
- pwm
- counter
- rng
- eeprom
1 change: 1 addition & 0 deletions boards/arm/nucleo_wl55jc/nucleo_wl55jc.yaml
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Expand Up @@ -18,6 +18,7 @@ supported:
- adc
- dac
- pwm
- counter
- dma
- watchdog
- nvs
Expand Down
1 change: 1 addition & 0 deletions boards/arm/stm32l562e_dk/stm32l562e_dk.yaml
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Expand Up @@ -10,6 +10,7 @@ supported:
- i2c
- lptim
- pwm
- counter
- watchdog
- dac
- adc
Expand Down
3 changes: 2 additions & 1 deletion drivers/clock_control/Kconfig.stm32
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Expand Up @@ -8,7 +8,8 @@ menuconfig CLOCK_CONTROL_STM32_CUBE
bool "STM32 Reset & Clock Control"
depends on SOC_FAMILY_STM32
select USE_STM32_LL_UTILS
select USE_STM32_LL_RCC if (SOC_SERIES_STM32MP1X || SOC_SERIES_STM32H7X)
select USE_STM32_LL_RCC if (SOC_SERIES_STM32MP1X || SOC_SERIES_STM32H7X || \
SOC_SERIES_STM32F4X || SOC_SERIES_STM32F7X)
help
Enable driver for Reset & Clock Control subsystem found
in STM32 family of MCUs
Expand Down
21 changes: 19 additions & 2 deletions drivers/counter/counter_ll_stm32_timer.c
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Expand Up @@ -18,6 +18,11 @@
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(counter_timer_stm32, CONFIG_COUNTER_LOG_LEVEL);

/* L0 series MCUs only have 16-bit timers and don't have below macro defined */
#ifndef IS_TIM_32B_COUNTER_INSTANCE
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE) (0)
#endif

/** Maximum number of timer channels. */
#define TIMER_MAX_CH 4U

Expand All @@ -37,7 +42,13 @@ static void(*const set_timer_compare[TIMER_MAX_CH])(TIM_TypeDef *,
};

/** Channel to compare get function mapping. */
#if !defined(CONFIG_SOC_SERIES_STM32F4X)
#if !defined(CONFIG_SOC_SERIES_STM32C0X) && \
!defined(CONFIG_SOC_SERIES_STM32F1X) && \
!defined(CONFIG_SOC_SERIES_STM32F2X) && \
!defined(CONFIG_SOC_SERIES_STM32F4X) && \
!defined(CONFIG_SOC_SERIES_STM32G4X) && \
!defined(CONFIG_SOC_SERIES_STM32L1X) && \
!defined(CONFIG_SOC_SERIES_STM32MP1X)
static uint32_t(*const get_timer_compare[TIMER_MAX_CH])(const TIM_TypeDef *) = {
LL_TIM_OC_GetCompareCH1, LL_TIM_OC_GetCompareCH2,
LL_TIM_OC_GetCompareCH3, LL_TIM_OC_GetCompareCH4,
Expand All @@ -62,7 +73,13 @@ static void(*const disable_it[TIMER_MAX_CH])(TIM_TypeDef *) = {

#ifdef CONFIG_ASSERT
/** Channel to interrupt enable check function mapping. */
#if !defined(CONFIG_SOC_SERIES_STM32F4X)
#if !defined(CONFIG_SOC_SERIES_STM32C0X) && \
!defined(CONFIG_SOC_SERIES_STM32F1X) && \
!defined(CONFIG_SOC_SERIES_STM32F2X) && \
!defined(CONFIG_SOC_SERIES_STM32F4X) && \
!defined(CONFIG_SOC_SERIES_STM32G4X) && \
!defined(CONFIG_SOC_SERIES_STM32L1X) && \
!defined(CONFIG_SOC_SERIES_STM32MP1X)
static uint32_t(*const check_it_enabled[TIMER_MAX_CH])(const TIM_TypeDef *) = {
LL_TIM_IsEnabledIT_CC1, LL_TIM_IsEnabledIT_CC2,
LL_TIM_IsEnabledIT_CC3, LL_TIM_IsEnabledIT_CC4,
Expand Down
20 changes: 20 additions & 0 deletions dts/arm/st/f0/stm32f0.dtsi
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Expand Up @@ -250,6 +250,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers14: timers@40002000 {
Expand All @@ -267,6 +272,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers16: timers@40014400 {
Expand All @@ -284,6 +294,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers17: timers@40014800 {
Expand All @@ -301,6 +316,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

adc1: adc@40012400 {
Expand Down
5 changes: 5 additions & 0 deletions dts/arm/st/f0/stm32f031.dtsi
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Expand Up @@ -23,6 +23,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

rtc@40002800 {
Expand Down
15 changes: 15 additions & 0 deletions dts/arm/st/f1/stm32f1.dtsi
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Expand Up @@ -271,6 +271,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers3: timers@40000400 {
Expand All @@ -288,6 +293,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers4: timers@40000800 {
Expand All @@ -305,6 +315,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

rtc: rtc@40002800 {
Expand Down
55 changes: 55 additions & 0 deletions dts/arm/st/f2/stm32f2.dtsi
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Expand Up @@ -445,6 +445,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers4: timers@40000800 {
Expand All @@ -462,6 +467,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers5: timers@40000c00 {
Expand All @@ -479,6 +489,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers6: timers@40001000 {
Expand All @@ -490,6 +505,11 @@
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers7: timers@40001400 {
Expand All @@ -501,6 +521,11 @@
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers8: timers@40010400 {
Expand Down Expand Up @@ -535,6 +560,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers10: timers@40014400 {
Expand All @@ -552,6 +582,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers11: timers@40014800 {
Expand All @@ -569,6 +604,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers12: timers@40001800 {
Expand All @@ -586,6 +626,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers13: timers@40001c00 {
Expand All @@ -603,6 +648,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers14: timers@40002000 {
Expand All @@ -620,6 +670,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

rng: rng@50060800 {
Expand Down
35 changes: 35 additions & 0 deletions dts/arm/st/f3/stm32f3.dtsi
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Expand Up @@ -277,6 +277,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers3: timers@40000400 {
Expand All @@ -294,6 +299,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers6: timers@40001000 {
Expand All @@ -305,6 +315,11 @@
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers7: timers@40001400 {
Expand All @@ -316,6 +331,11 @@
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers15: timers@40014000 {
Expand All @@ -333,6 +353,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers16: timers@40014400 {
Expand All @@ -350,6 +375,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

timers17: timers@40014800 {
Expand All @@ -367,6 +397,11 @@
status = "disabled";
#pwm-cells = <3>;
};

counter {
compatible = "st,stm32-counter";
status = "disabled";
};
};

rtc: rtc@40002800 {
Expand Down
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