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7 changes: 7 additions & 0 deletions dts/arm/st/f7/stm32f7.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,13 @@
};
};

quadspi_memory: memory@90000000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x90000000 DT_SIZE_M(256)>;
zephyr,memory-region = "QSPI";
zephyr,memory-region-mpu = "EXTMEM";
};

clocks {
clk_hse: clk-hse {
#clock-cells = <0>;
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7 changes: 7 additions & 0 deletions dts/arm/st/h7/stm32h7.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,13 @@
};
};

quadspi_memory: memory@90000000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x90000000 DT_SIZE_M(256)>;
zephyr,memory-region = "QSPI";
zephyr,memory-region-mpu = "EXTMEM";
};

clocks {
#address-cells = <1>;
#size-cells = <0>;
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1 change: 1 addition & 0 deletions dts/bindings/base/zephyr,memory-region.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,7 @@ properties:
- "FLASH"
- "PPB"
- "IO"
- "EXTMEM"
description: |
Signify that this node should result in a dedicated MPU region. The
region address and size are taken from the <reg> property, while the MPU
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2 changes: 2 additions & 0 deletions include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v7m.h
Original file line number Diff line number Diff line change
Expand Up @@ -137,6 +137,8 @@
#define REGION_PPB_ATTR(size) { (STRONGLY_ORDERED_SHAREABLE | size | \
P_RW_U_NA_Msk) }
#define REGION_IO_ATTR(size) { (DEVICE_NON_SHAREABLE | size | P_RW_U_NA_Msk) }
#define REGION_EXTMEM_ATTR(size) { (STRONGLY_ORDERED_SHAREABLE | size | \
NO_ACCESS_Msk) }

struct arm_mpu_region_attr {
/* Attributes belonging to RASR (including the encoded region size) */
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