[RFC] Make zephyr,memory-attr a capabilities bitmask

arch/arm/core/mpu/arm_mpu.c

@@ -11,6 +11,8 @@
 #include "arm_core_mpu_dev.h"
 #include <zephyr/linker/linker-defs.h>
 #include <kernel_arch_data.h>
+#include <zephyr/mem_mgmt/mem_attr.h>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 
 #define LOG_LEVEL CONFIG_MPU_LOG_LEVEL
 #include <zephyr/logging/log.h>
@@ -32,6 +34,13 @@ LOG_MODULE_DECLARE(mpu);
 #define NUM_MPU_REGIONS   DT_PROP(MPU_NODEID, arm_num_mpu_regions)
 #endif
 
+#define NODE_HAS_PROP_AND_OR(node_id, prop) \
+	DT_NODE_HAS_PROP(node_id, prop) ||
+
+BUILD_ASSERT((DT_FOREACH_STATUS_OKAY_NODE_VARGS(
+	      NODE_HAS_PROP_AND_OR, zephyr_memory_region_mpu) false) == false,
+	      "`zephyr,memory-region-mpu` was deprecated in favor of `zephyr,memory-attr`");
+
 /*
  * Global status variable holding the number of HW MPU region indices, which
  * have been reserved by the MPU driver to program the static (fixed) memory
@@ -74,6 +83,79 @@ static int region_allocate_and_init(const uint8_t index,
 	return index;
 }
 
+#define _BUILD_REGION_CONF(reg, _ATTR)					\
+	(struct arm_mpu_region) ARM_MPU_REGION_INIT((reg).dt_name,	\
+						    (reg).dt_addr,	\
+						    (reg).dt_size,	\
+						    _ATTR)
+
+/* This internal function programs the MPU regions defined in the DT when using
+ * the `zephyr,memory-attr = <( DT_MEM_ARM(...) )>` property.
+ */
+static int mpu_configure_regions_from_dt(uint8_t *reg_index)
+{
+	const struct mem_attr_region_t *region;
+	size_t num_regions;
+
+	num_regions = mem_attr_get_regions(&region);
+
+	for (size_t idx = 0; idx < num_regions; idx++) {
+		struct arm_mpu_region region_conf;
+
+		switch (DT_MEM_ARM_MASK(region[idx].dt_attr)) {
+		case DT_MEM_ARM_MPU_RAM:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_ATTR);
+			break;
+#ifdef REGION_RAM_NOCACHE_ATTR
+		case DT_MEM_ARM_MPU_RAM_NOCACHE:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_NOCACHE_ATTR);
+			__ASSERT(!(region[idx].dt_attr & DT_MEM_CACHEABLE),
+				 "RAM_NOCACHE with DT_MEM_CACHEABLE attribute\n");
+			break;
+#endif
+#ifdef REGION_FLASH_ATTR
+		case DT_MEM_ARM_MPU_FLASH:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_FLASH_ATTR);
+			break;
+#endif
+#ifdef REGION_PPB_ATTR
+		case DT_MEM_ARM_MPU_PPB:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_PPB_ATTR);
+			break;
+#endif
+#ifdef REGION_IO_ATTR
+		case DT_MEM_ARM_MPU_IO:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_IO_ATTR);
+			break;
+#endif
+#ifdef REGION_EXTMEM_ATTR
+		case DT_MEM_ARM_MPU_EXTMEM:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_EXTMEM_ATTR);
+			break;
+#endif
+		default:
+			/* Either the specified `ATTR_MPU_*` attribute does not
+			 * exists or the `REGION_*_ATTR` macro is not defined
+			 * for that attribute.
+			 */
+			LOG_ERR("Invalid attribute for the region\n");
+			return -EINVAL;
+		}
+#if defined(CONFIG_ARMV7_R)
+		region_conf.size = size_to_mpu_rasr_size(region[idx].dt_size);
+#endif
+
+		if (region_allocate_and_init((*reg_index),
+					     (const struct arm_mpu_region *) &region_conf) < 0) {
+			return -EINVAL;
+		}
+
+		(*reg_index)++;
+	}
+
+	return 0;
+}
+
 /* This internal function programs an MPU region
  * of a given configuration at a given MPU index.
  */
@@ -375,6 +457,11 @@ int z_arm_mpu_init(void)
 	/* Update the number of programmed MPU regions. */
 	static_regions_num = mpu_config.num_regions;
 
+	/* DT-defined MPU regions. */
+	if (mpu_configure_regions_from_dt(&static_regions_num) == -EINVAL) {
+		__ASSERT(0, "Failed to allocate MPU regions from DT\n");
+		return -EINVAL;
+	}
 
 	arm_core_mpu_enable();
 

arch/arm/core/mpu/nxp_mpu.c

@@ -13,11 +13,20 @@
 #include <zephyr/sys/math_extras.h>
 #include <zephyr/sys/barrier.h>
 #include <zephyr/linker/linker-defs.h>
+#include <zephyr/mem_mgmt/mem_attr.h>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 
 #define LOG_LEVEL CONFIG_MPU_LOG_LEVEL
 #include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(mpu);
 
+#define NODE_HAS_PROP_AND_OR(node_id, prop) \
+	DT_NODE_HAS_PROP(node_id, prop) ||
+
+BUILD_ASSERT((DT_FOREACH_STATUS_OKAY_NODE_VARGS(
+	      NODE_HAS_PROP_AND_OR, zephyr_memory_region_mpu) false) == false,
+	      "`zephyr,memory-region-mpu` was deprecated in favor of `zephyr,memory-attr`");
+
 /*
  * Global status variable holding the number of HW MPU region indices, which
  * have been reserved by the MPU driver to program the static (fixed) memory
@@ -134,6 +143,60 @@ static int region_allocate_and_init(const uint8_t index,
 	return index;
 }
 
+#define _BUILD_REGION_CONF(reg, _ATTR)						\
+	(struct nxp_mpu_region) { .name = (reg).dt_name,			\
+				  .base = (reg).dt_addr,			\
+				  .end  = (reg).dt_addr + (reg).dt_size,	\
+				  .attr = _ATTR,				\
+				}
+
+/* This internal function programs the MPU regions defined in the DT when using
+ * the `zephyr,memory-attr = <( DT_MEM_ARM(...) )>` property.
+ */
+static int mpu_configure_regions_from_dt(uint8_t *reg_index)
+{
+	const struct mem_attr_region_t *region;
+	size_t num_regions;
+
+	num_regions = mem_attr_get_regions(&region);
+
+	for (size_t idx = 0; idx < num_regions; idx++) {
+		struct nxp_mpu_region region_conf;
+
+		switch (DT_MEM_ARM_MASK(region[idx].dt_attr)) {
+		case DT_MEM_ARM_MPU_RAM:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_ATTR);
+			break;
+#ifdef REGION_FLASH_ATTR
+		case DT_MEM_ARM_MPU_FLASH:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_FLASH_ATTR);
+			break;
+#endif
+#ifdef REGION_IO_ATTR
+		case DT_MEM_ARM_MPU_IO:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_IO_ATTR);
+			break;
+#endif
+		default:
+			/* Either the specified `ATTR_MPU_*` attribute does not
+			 * exists or the `REGION_*_ATTR` macro is not defined
+			 * for that attribute.
+			 */
+			LOG_ERR("Invalid attribute for the region\n");
+			return -EINVAL;
+		}
+
+		if (region_allocate_and_init((*reg_index),
+					     (const struct nxp_mpu_region *) &region_conf) < 0) {
+			return -EINVAL;
+		}
+
+		(*reg_index)++;
+	}
+
+	return 0;
+}
+
 /**
  * This internal function is utilized by the MPU driver to combine a given
  * region attribute configuration and size and fill-in a driver-specific
@@ -636,6 +699,11 @@ int z_arm_mpu_init(void)
 	/* Update the number of programmed MPU regions. */
 	static_regions_num = mpu_config.num_regions;
 
+	/* DT-defined MPU regions. */
+	if (mpu_configure_regions_from_dt(&static_regions_num) == -EINVAL) {
+		__ASSERT(0, "Failed to allocate MPU regions from DT\n");
+		return -EINVAL;
+	}
 
 	arm_core_mpu_enable();
 

arch/arm64/core/cortex_r/arm_mpu.c

@@ -15,9 +15,18 @@
 #include <zephyr/sys/check.h>
 #include <zephyr/sys/barrier.h>
 #include <zephyr/cache.h>
+#include <zephyr/mem_mgmt/mem_attr.h>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 
 LOG_MODULE_REGISTER(mpu, CONFIG_MPU_LOG_LEVEL);
 
+#define NODE_HAS_PROP_AND_OR(node_id, prop) \
+	DT_NODE_HAS_PROP(node_id, prop) ||
+
+BUILD_ASSERT((DT_FOREACH_STATUS_OKAY_NODE_VARGS(
+	      NODE_HAS_PROP_AND_OR, zephyr_memory_region_mpu) false) == false,
+	      "`zephyr,memory-region-mpu` was deprecated in favor of `zephyr,memory-attr`");
+
 #define MPU_DYNAMIC_REGION_AREAS_NUM	1
 
 #ifdef CONFIG_USERSPACE
@@ -167,6 +176,64 @@ static ALWAYS_INLINE void region_init(const uint32_t index,
 	mpu_set_region(index, rbar, rlar);
 }
 
+#define _BUILD_REGION_CONF(reg, _ATTR)						\
+	(struct arm_mpu_region) { .name  = (reg).dt_name,			\
+				  .base  = (reg).dt_addr,			\
+				  .limit = (reg).dt_addr + (reg).dt_size,	\
+				  .attr  = _ATTR,				\
+				}
+
+/* This internal function programs the MPU regions defined in the DT when using
+ * the `zephyr,memory-attr = <( DT_MEM_ARM(...) )>` property.
+ */
+static int mpu_configure_regions_from_dt(uint8_t *reg_index)
+{
+	const struct mem_attr_region_t *region;
+	size_t num_regions;
+
+	num_regions = mem_attr_get_regions(&region);
+
+	for (size_t idx = 0; idx < num_regions; idx++) {
+		struct arm_mpu_region region_conf;
+
+		switch (DT_MEM_ARM_MASK(region[idx].dt_attr)) {
+		case DT_MEM_ARM_MPU_RAM:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_ATTR);
+			break;
+#ifdef REGION_RAM_NOCACHE_ATTR
+		case DT_MEM_ARM_MPU_RAM_NOCACHE:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_RAM_NOCACHE_ATTR);
+			__ASSERT(!(region[idx].dt_attr & DT_MEM_CACHEABLE),
+				 "RAM_NOCACHE with DT_MEM_CACHEABLE attribute\n");
+			break;
+#endif
+#ifdef REGION_FLASH_ATTR
+		case DT_MEM_ARM_MPU_FLASH:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_FLASH_ATTR);
+			break;
+#endif
+#ifdef REGION_IO_ATTR
+		case DT_MEM_ARM_MPU_IO:
+			region_conf = _BUILD_REGION_CONF(region[idx], REGION_IO_ATTR);
+			break;
+#endif
+		default:
+			/* Either the specified `ATTR_MPU_*` attribute does not
+			 * exists or the `REGION_*_ATTR` macro is not defined
+			 * for that attribute.
+			 */
+			LOG_ERR("Invalid attribute for the region\n");
+			return -EINVAL;
+		}
+
+		region_init((*reg_index), (const struct arm_mpu_region *) &region_conf);
+
+		(*reg_index)++;
+	}
+
+	return 0;
+}
+
 /*
  * @brief MPU default configuration
  *
@@ -222,6 +289,12 @@ FUNC_NO_STACK_PROTECTOR void z_arm64_mm_init(bool is_primary_core)
 	/* Update the number of programmed MPU regions. */
 	static_regions_num = mpu_config.num_regions;
 
+	/* DT-defined MPU regions. */
+	if (mpu_configure_regions_from_dt(&static_regions_num) == -EINVAL) {
+		__ASSERT(0, "Failed to allocate MPU regions from DT\n");
+		return;
+	}
+
 	arm_core_mpu_enable();
 
 	if (!is_primary_core) {

boards/arm/arduino_giga_r1/arduino_giga_r1_m7.dts

@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <st/h7/stm32h747Xi_m7.dtsi>
 #include <st/h7/stm32h747xihx-pinctrl.dtsi>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 #include "arduino_giga_r1.dtsi"
 
 / {
@@ -29,7 +30,7 @@
 		device_type = "memory";
 		reg = <0xc0000000 DT_SIZE_M(8)>;
 		zephyr,memory-region = "SDRAM1";
-		zephyr,memory-attr = "RAM";
+		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
 	};
 
 	aliases {

boards/arm/stm32f746g_disco/stm32f746g_disco.dts

@@ -9,6 +9,8 @@
 #include <st/f7/stm32f746nghx-pinctrl.dtsi>
 #include "arduino_r3_connector.dtsi"
 #include <zephyr/dt-bindings/input/input-event-codes.h>
+#include <zephyr/dt-bindings/memory-attr/memory-attr.h>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 
 / {
 	model = "STMicroelectronics STM32F746G DISCOVERY board";
@@ -51,7 +53,7 @@
 		device_type = "memory";
 		reg = <0xc0000000 DT_SIZE_M(16)>;
 		zephyr,memory-region = "SDRAM1";
-		zephyr,memory-attr = "RAM";
+		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
 	};
 
 	aliases {

boards/arm/stm32f7508_dk/stm32f7508_dk.dts

@@ -8,6 +8,7 @@
 /dts-v1/;
 #include <st/f7/stm32f750X8.dtsi>
 #include <st/f7/stm32f750n8hx-pinctrl.dtsi>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 #include "arduino_r3_connector.dtsi"
 #include <zephyr/dt-bindings/input/input-event-codes.h>
 
@@ -52,7 +53,7 @@
 		device_type = "memory";
 		reg = <0xc0000000 DT_SIZE_M(16)>;
 		zephyr,memory-region = "SDRAM1";
-		zephyr,memory-attr = "RAM";
+		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
 	};
 
 	aliases {

boards/arm/stm32f769i_disco/stm32f769i_disco.dts

@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <st/f7/stm32f769Xi.dtsi>
 #include <st/f7/stm32f769nihx-pinctrl.dtsi>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 #include "arduino_r3_connector.dtsi"
 #include <zephyr/dt-bindings/input/input-event-codes.h>
 
@@ -28,7 +29,7 @@
 		device_type = "memory";
 		reg = <0xc0000000 DT_SIZE_M(16)>;
 		zephyr,memory-region = "SDRAM1";
-		zephyr,memory-attr = "RAM";
+		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
 	};
 
 	leds {

boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts

@@ -7,6 +7,7 @@
 /dts-v1/;
 #include <st/h7/stm32h747Xi_m7.dtsi>
 #include <st/h7/stm32h747xihx-pinctrl.dtsi>
+#include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
 #include "stm32h747i_disco.dtsi"
 
 / {
@@ -27,7 +28,7 @@
 		device_type = "memory";
 		reg = <0xd0000000 DT_SIZE_M(32)>;
 		zephyr,memory-region = "SDRAM2";
-		zephyr,memory-attr = "RAM";
+		zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
 	};
 
 	leds {