Add MAX32662

boards/adi/max32662evkit/Kconfig.max32662evkit

@@ -0,0 +1,7 @@
+# MAX32662EVKIT boards configuration
+
+# Copyright (c) 2024 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_MAX32662EVKIT
+	select SOC_MAX32662

boards/adi/max32662evkit/board.cmake

@@ -0,0 +1,9 @@
+# Copyright (c) 2024 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(openocd --cmd-pre-init "source [find interface/cmsis-dap.cfg]")
+board_runner_args(openocd --cmd-pre-init "source [find target/max32662.cfg]")
+board_runner_args(jlink "--device=MAX32662" "--reset-after-load")
+
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/adi/max32662evkit/board.yml

@@ -0,0 +1,8 @@
+# Copyright (c) 2024 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+board:
+  name: max32662evkit
+  vendor: adi
+  socs:
+    - name: max32662

boards/adi/max32662evkit/max32662evkit.dts

@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2024 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <adi/max32/max32662.dtsi>
+#include <adi/max32/max32662-pinctrl.dtsi>
+#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
+#include <zephyr/dt-bindings/input/input-event-codes.h>
+
+/ {
+	model = "Analog Devices MAX32662EVKIT";
+	compatible = "adi,max32662evkit";
+
+	chosen {
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,sram = &sram2;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led1: led_1 {
+			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+			label = "Red LED";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+		pb1: pb1 {
+			gpios = <&gpio0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW
+						| MAX32_GPIO_VSEL_VDDIOH)>;
+			label = "SW3";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &led1;
+		sw0 = &pb1;
+	};
+};
+
+&uart0 {
+	pinctrl-0 = <&uart0a_tx_p0_10 &uart0a_rx_p0_11>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+	data-bits = <8>;
+	parity = "none";
+	status = "okay";
+};
+
+&clk_ipo {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&trng {
+	status = "okay";
+};

boards/adi/max32662evkit/max32662evkit.yaml

@@ -0,0 +1,15 @@
+identifier: max32662evkit
+name: max32662evkit
+vendor: adi
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gnuarmemb
+  - xtools
+supported:
+  - gpio
+  - serial
+  - trng
+ram: 80
+flash: 256

boards/adi/max32662evkit/max32662evkit_defconfig

@@ -0,0 +1,13 @@
+# Copyright (c) 2024 Analog Devices, Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable UART
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y

dts/arm/adi/max32/max32662-pinctrl.dtsi

@@ -0,0 +1,238 @@
+/*
+ * Copyright (c) 2024 Analog Devices, Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
+
+/ {
+	soc {
+		pinctrl: pin-controller@40008000 {
+
+			/omit-if-no-ref/ swdio_p0_0: swdio_p0_0 {
+				pinmux = <MAX32_PINMUX(0, 0, AF1)>;
+			};
+
+			/omit-if-no-ref/ pt0b_p0_0: pt0b_p0_0 {
+				pinmux = <MAX32_PINMUX(0, 0, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_oa_p0_0: tmr0c_oa_p0_0 {
+				pinmux = <MAX32_PINMUX(0, 0, AF3)>;
+			};
+
+			/omit-if-no-ref/ tmr1d_oa_p0_0: tmr1d_oa_p0_0 {
+				pinmux = <MAX32_PINMUX(0, 0, AF4)>;
+			};
+
+			/omit-if-no-ref/ adc_trig_e_p0_0: adc_trig_e_p0_0 {
+				pinmux = <MAX32_PINMUX(0, 0, AF5)>;
+			};
+
+			/omit-if-no-ref/ swdclk_p0_1: swdclk_p0_1 {
+				pinmux = <MAX32_PINMUX(0, 1, AF1)>;
+			};
+
+			/omit-if-no-ref/ pt1b_p0_1: pt1b_p0_1 {
+				pinmux = <MAX32_PINMUX(0, 1, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_ia_p0_1: tmr0c_ia_p0_1 {
+				pinmux = <MAX32_PINMUX(0, 1, AF3)>;
+			};
+
+			/omit-if-no-ref/ tmr1d_ia_p0_1: tmr1d_ia_p0_1 {
+				pinmux = <MAX32_PINMUX(0, 1, AF4)>;
+			};
+
+			/omit-if-no-ref/ spi0a_cito_p0_2: spi0a_cito_p0_2 {
+				pinmux = <MAX32_PINMUX(0, 2, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart1b_tx_p0_2: uart1b_tx_p0_2 {
+				pinmux = <MAX32_PINMUX(0, 2, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_ia_p0_2: tmr0c_ia_p0_2 {
+				pinmux = <MAX32_PINMUX(0, 2, AF3)>;
+			};
+
+			/omit-if-no-ref/ pt0d_p0_2: pt0d_p0_2 {
+				pinmux = <MAX32_PINMUX(0, 2, AF4)>;
+			};
+
+			/omit-if-no-ref/ i2s0e_sdo_p0_2: i2s0e_sdo_p0_2 {
+				pinmux = <MAX32_PINMUX(0, 2, AF5)>;
+			};
+
+			/omit-if-no-ref/ spi0a_copi_p0_3: spi0a_copi_p0_3 {
+				pinmux = <MAX32_PINMUX(0, 3, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart1b_rx_p0_3: uart1b_rx_p0_3 {
+				pinmux = <MAX32_PINMUX(0, 3, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr0c_oa_p0_3: tmr0c_oa_p0_3 {
+				pinmux = <MAX32_PINMUX(0, 3, AF3)>;
+			};
+
+			/omit-if-no-ref/ pt1d_p0_3: pt1d_p0_3 {
+				pinmux = <MAX32_PINMUX(0, 3, AF4)>;
+			};
+
+			/omit-if-no-ref/ i2s0e_sdi_p0_3: i2s0e_sdi_p0_3 {
+				pinmux = <MAX32_PINMUX(0, 3, AF5)>;
+			};
+
+			/omit-if-no-ref/ spi0a_sck_p0_4: spi0a_sck_p0_4 {
+				pinmux = <MAX32_PINMUX(0, 4, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart1b_cts_p0_4: uart1b_cts_p0_4 {
+				pinmux = <MAX32_PINMUX(0, 4, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr1c_ia_p0_4: tmr1c_ia_p0_4 {
+				pinmux = <MAX32_PINMUX(0, 4, AF3)>;
+			};
+
+			/omit-if-no-ref/ pt2d_p0_4: pt2d_p0_4 {
+				pinmux = <MAX32_PINMUX(0, 4, AF4)>;
+			};
+
+			/omit-if-no-ref/ i2s0e_bclk_p0_4: i2s0e_bclk_p0_4 {
+				pinmux = <MAX32_PINMUX(0, 4, AF5)>;
+			};
+
+			/omit-if-no-ref/ spi0a_ts0_p0_5: spi0a_ts0_p0_5 {
+				pinmux = <MAX32_PINMUX(0, 5, AF1)>;
+			};
+
+			/omit-if-no-ref/ uart1b_rts_p0_5: uart1b_rts_p0_5 {
+				pinmux = <MAX32_PINMUX(0, 5, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr1c_oa_p0_5: tmr1c_oa_p0_5 {
+				pinmux = <MAX32_PINMUX(0, 5, AF3)>;
+			};
+
+			/omit-if-no-ref/ pt3d_p0_5: pt3d_p0_5 {
+				pinmux = <MAX32_PINMUX(0, 5, AF4)>;
+			};
+
+			/omit-if-no-ref/ i2s0e_lrclk_p0_5: i2s0e_lrclk_p0_5 {
+				pinmux = <MAX32_PINMUX(0, 5, AF5)>;
+			};
+
+			/omit-if-no-ref/ i2c1a_scl_p0_6: i2c1a_scl_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF1)>;
+			};
+
+			/omit-if-no-ref/ can0b_rx_p0_6: can0b_rx_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr2c_ia_p0_6: tmr2c_ia_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF3)>;
+			};
+
+			/omit-if-no-ref/ hf_ext_clk_p0_6: hf_ext_clk_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF4)>;
+			};
+
+			/omit-if-no-ref/ pt2e_p0_6: pt2e_p0_6 {
+				pinmux = <MAX32_PINMUX(0, 6, AF5)>;
+			};
+
+			/omit-if-no-ref/ i2c1a_sda_p0_9: i2c1a_sda_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF1)>;
+			};
+
+			/omit-if-no-ref/ can0b_tx_p0_9: can0b_tx_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF2)>;
+			};
+
+			/omit-if-no-ref/ tmr2c_oa_p0_9: tmr2c_oa_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF3)>;
+			};
+
+			/omit-if-no-ref/ adc_trig_d_p0_9: adc_trig_d_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF4)>;
+			};
+
+			/omit-if-no-ref/ pt3e_p0_9: pt3e_p0_9 {
+				pinmux = <MAX32_PINMUX(0, 9, AF5)>;
+			};
+
+			/omit-if-no-ref/ uart0a_tx_p0_10: uart0a_tx_p0_10 {
+				pinmux = <MAX32_PINMUX(0, 10, AF1)>;
+			};
+
+			/omit-if-no-ref/ spi1b_ts0_p0_10: spi1b_ts0_p0_10 {
+				pinmux = <MAX32_PINMUX(0, 10, AF2)>;
+			};
+
+			/omit-if-no-ref/ ain3_p0_10: ain3_p0_10 {
+				pinmux = <MAX32_PINMUX(0, 10, AF4)>;
+			};
+
+			/omit-if-no-ref/ uart0a_rx_p0_11: uart0a_rx_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF1)>;
+			};
+
+			/omit-if-no-ref/ spi1b_sck_p0_11: spi1b_sck_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF2)>;
+			};
+
+			/omit-if-no-ref/ cal32k_p0_11: cal32k_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF3)>;
+			};
+
+			/omit-if-no-ref/ ain2_p0_11: ain2_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF4)>;
+			};
+
+			/omit-if-no-ref/ lp_ext_clk_p0_11: lp_ext_clk_p0_11 {
+				pinmux = <MAX32_PINMUX(0, 11, AF5)>;
+			};
+
+			/omit-if-no-ref/ i2c0a_scl_p0_12: i2c0a_scl_p0_12 {
+				pinmux = <MAX32_PINMUX(0, 12, AF1)>;
+			};
+
+			/omit-if-no-ref/ spi1b_coti_p0_12: spi1b_coti_p0_12 {
+				pinmux = <MAX32_PINMUX(0, 12, AF2)>;
+			};
+
+			/omit-if-no-ref/ lptmr0c_ia_p0_12: lptmr0c_ia_p0_12 {
+				pinmux = <MAX32_PINMUX(0, 12, AF3)>;
+			};
+
+			/omit-if-no-ref/ ain1_p0_12: ain1_p0_12 {
+				pinmux = <MAX32_PINMUX(0, 12, AF4)>;
+			};
+
+			/omit-if-no-ref/ lptmr0e_oan_p0_12: lptmr0e_oan_p0_12 {
+				pinmux = <MAX32_PINMUX(0, 12, AF5)>;
+			};
+
+			/omit-if-no-ref/ i2c0a_sda_p0_13: i2c0a_sda_p0_13 {
+				pinmux = <MAX32_PINMUX(0, 13, AF1)>;
+			};
+
+			/omit-if-no-ref/ spi1b_cito_p0_13: spi1b_cito_p0_13 {
+				pinmux = <MAX32_PINMUX(0, 13, AF2)>;
+			};
+
+			/omit-if-no-ref/ lptmr0c_oa_p0_13: lptmr0c_oa_p0_13 {
+				pinmux = <MAX32_PINMUX(0, 13, AF3)>;
+			};
+
+			/omit-if-no-ref/ ain0_p0_13: ain0_p0_13 {
+				pinmux = <MAX32_PINMUX(0, 13, AF4)>;
+			};
+		};
+	};
+};