[DRAFT] RA6 RA4 RA2 MCU minimal support

boards/renesas/ek_ra2a1/Kconfig.ek_ra2a1

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_EK_RA2A1
+	select SOC_R7FA2A1AB3CFM

boards/renesas/ek_ra2a1/board.cmake

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=R7FA2A1AB")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/renesas/ek_ra2a1/board.yml

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+board:
+  name: ek_ra2a1
+  vendor: renesas
+  socs:
+  - name: r7fa2a1ab3cfm

boards/renesas/ek_ra2a1/doc/index.rst

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+.. _ek_ra2a1:
+
+RA2A1 Evaluation Kit
+####################
+
+Overview
+********
+
+The Renesas RA2A1 group uses the high-performance Arm® Cortex®-M23 core and
+offers offers highly integrated, high-accuracy analog capabilities. The RA2A1
+group supports a wide operating voltage range of 1.6V to 5.5V. It includes
+a 16-bit SAR ADC, 24-bit Sigma-Delta ADC, comparators, operational amplifiers,
+and DACs. The RA2A1 MCU targets cost-sensitive and low-power industrial sensor
+applications where high-resolution analog will become a cost-benefit.
+
+The EK-RA2A1 v1 enables developers to get started with initial firmware development
+
+**Renesas RA2A1 Microcontroller Group**
+
+- 48MHz Arm Cortex-M23 (Armv8-M architecture) with Arm MPU
+- 64-pins LQFP package
+- 32 KB SRAM
+- 256 KB code flash memory
+- 8 KB data flash memory
+
+**Connectivity**
+
+- A Device USB connector for the Main MCU
+- S124 MCU based SEGGER J-Link® On-Board interface for debugging and programming of
+  the RA2A1 MCU. A 10-pin JTAG/SWD interface is also provided for connecting optional
+  external debuggers and programmers.
+- Two PMOD connectors, allowing use of appropriate PMOD compliant peripheral plug-in
+  modules for rapid prototyping
+- Pin headers for access to power and signals for the Main MCU
+
+**Multiple clock sources**
+
+- Main MCU oscillator crystals, providing precision 12.000 MHz and 32,768 Hz external
+  reference clocks
+- Additional low-precision clocks are available internal to the Main MCU
+
+**System Control and Ecosystem Access**
+
+- User LEDs and buttons
+  - MCU reset push-button switch
+  - A two-color board status LED indicating availability of regulated power and connection status of the J-Link
+    interface
+  - A red User LED, controlled by the Main MCU firmware
+  - A User Push-Button switch, User Capacitive Touch Button sensor, and an optional User Potentiometer
+    all of which are controlled by the Main MCU firmware
+
+- MCU boot configuration jumper
+
+.. figure:: ek-ra2a1-board.jpg
+	:align: center
+	:alt: RA2A1 Evaluation Kit
+
+	EK-RA2A1 Board Functional Area Definitions (Credit: Renesas Electronics Corporation)
+
+Hardware
+********
+Detail Hardware feature for the RA2A1 MCU group can be found at `RA2A1 Group User's Manual Hardware`_
+
+.. figure:: ra2a1-block-diagram.jpg
+	:width: 442px
+	:align: center
+	:alt: RA2A1 MCU group feature
+
+	RA2A1 Block diagram (Credit: Renesas Electronics Corporation)
+
+Detail Hardware feature for the EK-RA2A1 MCU can be found at `EK-RA2A1 - User's Manual`_
+
+Supported Features
+==================
+
+The below features are currently supported on Zephyr OS for EK-RA2A1 board:
+
++-----------+------------+----------------------+
+| Interface | Controller | Driver/Component     |
++===========+============+======================+
+| GPIO      | on-chip    | gpio                 |
++-----------+------------+----------------------+
+| MPU       | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| NVIC      | on-chip    | arch/arm             |
++-----------+------------+----------------------+
+| UART      | on-chip    | serial               |
++-----------+------------+----------------------+
+| CLOCK     | on-chip    | clock control        |
++-----------+------------+----------------------+
+
+Other hardware features are currently not supported by the port.
+
+Programming and Debugging
+*************************
+
+Applications for the ``ek_ra2a1`` board configuration can be
+built, flashed, and debugged in the usual way. See
+:ref:`build_an_application` and :ref:`application_run` for more details on
+building and running.
+
+Flashing
+========
+
+Program can be flashed to EK-RA2A1 via the on-board SEGGER J-Link debugger.
+SEGGER J-link's drivers are avaialbe at https://www.segger.com/downloads/jlink/
+
+To flash the program to board
+
+  1. Connect to J-Link OB via USB port to host PC
+
+  2. Make sure J-Link OB jumper is in default configuration as describe in `EK-RA2A1 - User's Manual`_
+
+  3. Execute west command
+
+	.. code-block:: console
+
+		west flash -r jlink
+
+Debugging
+=========
+
+You can use Segger Ozone (`Segger Ozone Download`_) for a visual debug interface
+
+Once downloaded and installed, open Segger Ozone and configure the debug project
+like so:
+
+* Target Device: R7FA2A1AB
+* Target Interface: SWD
+* Target Interface Speed: 4 MHz
+* Host Interface: USB
+* Program File: <path/to/your/build/zephyr.elf>
+
+References
+**********
+- `EK-RA2A1 Website`_
+- `RA2A1 MCU group Website`_
+
+.. _EK-RA2A1 Website:
+   https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ek-ra2a1-evaluation-kit-ra2a1-mcu-group
+
+.. _RA2A1 MCU group Website:
+   https://www.renesas.com/us/en/products/microcontrollers-microprocessors/ra-cortex-m-mcus/ra2a1-32-bit-microcontrollers-48mhz-arm-cortex-m23-and-integration-24-bit-sigma-delta-adc
+
+.. _EK-RA2A1 - User's Manual:
+   https://www.renesas.com/us/en/document/mat/ek-ra2a1-v1-users-manual
+
+.. _RA2A1 Group User's Manual Hardware:
+   https://www.renesas.com/us/en/document/mah/renesas-ra2a1-group-users-manual-hardware
+
+.. _Segger Ozone Download:
+   https://www.segger.com/downloads/jlink#Ozone

boards/renesas/ek_ra2a1/ek_ra2a1-pinctrl.dtsi

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+/*
+ * Copyright (c) 2024 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	sci0_default: sci0_default {
+		group1 {
+			/* tx rx */
+			psels = <RA_PSEL(RA_PSEL_SCI_0, 4, 11)>,
+			<RA_PSEL(RA_PSEL_SCI_0, 2, 4)>;
+		};
+	};
+};

boards/renesas/ek_ra2a1/ek_ra2a1.dts

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+/*
+ * Copyright (c) 2024 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <renesas/ra/ra2/r7fa2a1ab3cfm.dtsi>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "ek_ra2a1-pinctrl.dtsi"
+
+/ {
+	model = "Renesas EK-RA2A1";
+	compatible = "renesas,ra2a1", "renesas,ra";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+		zephyr,flash = &flash0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		led1: led1 {
+			gpios = <&ioport2 5 GPIO_ACTIVE_HIGH>;
+			label = "LED1";
+		};
+	};
+
+	aliases {
+		led0 = &led1;
+	};
+};
+
+&xtal {
+	clock-frequency = <DT_FREQ_M(12)>;
+	mosel = <0>;
+	#clock-cells = <0>;
+	status = "okay";
+};
+
+&subclk {
+	status = "okay";
+};
+
+&ioport2 {
+	status = "okay";
+};
+
+&sci0 {
+	pinctrl-0 = <&sci0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+	uart0: uart {
+		current-speed = <115200>;
+		status = "okay";
+	};
+};

boards/renesas/ek_ra2a1/ek_ra2a1.yaml

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+identifier: ek_ra2a1
+name: Renesas EK-RA2A1
+type: mcu
+arch: arm
+ram: 32
+flash: 256
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - gpio
+  - uart

boards/renesas/ek_ra2a1/ek_ra2a1_defconfig

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
+
+# Enable GPIO
+CONFIG_GPIO=y
+CONFIG_PINCTRL=y
+
+# Enable Console
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+CONFIG_BUILD_OUTPUT_HEX=y
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_CLOCK_CONTROL=y

boards/renesas/ek_ra2l1/Kconfig.ek_ra2l1

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_EK_RA2L1
+	select SOC_R7FA2L1AB2DFP

boards/renesas/ek_ra2l1/board.cmake

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+# Copyright (c) 2024 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(jlink "--device=R7FA2L1AB")
+
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/renesas/ek_ra2l1/board.yml

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+board:
+  name: ek_ra2l1
+  vendor: renesas
+  socs:
+  - name: r7fa2l1ab2dfp