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Preserve SECONDS fields when clearing Clock Halt bit at initialisation (#77354) #77727
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Preserve SECONDS fields when clearing Clock Halt bit at initialisation (#77354) #77727
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Hello @clodnut, and thank you very much for your first pull request to the Zephyr project! |
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Hi, you need to squash your commits and force push the single commit, and make the header of said commit a bit more descriptive :) |
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Hi, could you rebase and force push? the changes are good, but CI is stuck for whatever reason :) |
bjarki-andreasen
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Nice :)
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lastly, please update the signed off entry to match the user you committed with, maybe you user "clodnut" needs to updated with the name in you signed of with? |
Thank you. Updated (I don't believe I can re-trigger the pipeline to confirm). |
@clodnut did you forget to (force) push your change? |
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@clodnut , can you help address the CI compliance check failures. |
We read/modify/write the CH/SECONDS register at initialisation to clear only the Clock Halt bit and only if it is set. The previous implementation zeroes the entire register unconditionally at initialisation, which wipes the SECONDS fields. Fixes #77354. Signed-off-by: Andrew Feldhaus <[email protected]>
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@mmahadevan108 should be good to go now |
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Hi @clodnut! To celebrate this milestone and showcase your contribution, we'd love to award you the Zephyr Technical Contributor badge. If you're interested, please claim your badge by filling out this form: Claim Your Zephyr Badge. Thank you for your valuable input, and we look forward to seeing more of your contributions in the future! 🪁 |
drivers: rtc: rtc_1307.c
Read/modify/write the CH/SECONDS register at initialisation to clear only the Clock Halt bit and only if it is set.
This prevents the SECONDS field(s) from being wiped out unconditionally at initialisation.
Fixes #77354.