boards: m5stack: cores3: Add CoreS3 SE variant

boards/m5stack/m5stack_cores3/Kconfig

@@ -3,5 +3,6 @@
 
 config HEAP_MEM_POOL_ADD_SIZE_BOARD
 	int
-	default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU
+	default 4096 if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \
+			BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE
 	default 256 if BOARD_M5STACK_CORES3_ESP32S3_APPCPU

boards/m5stack/m5stack_cores3/Kconfig.m5stack_cores3

@@ -5,5 +5,6 @@
 
 config BOARD_M5STACK_CORES3
 	select SOC_ESP32S3
-	select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU
+	select SOC_ESP32S3_PROCPU if BOARD_M5STACK_CORES3_ESP32S3_PROCPU || \
+				     BOARD_M5STACK_CORES3_ESP32S3_PROCPU_SE
 	select SOC_ESP32S3_APPCPU if BOARD_M5STACK_CORES3_ESP32S3_APPCPU

boards/m5stack/m5stack_cores3/board.yml

@@ -4,3 +4,6 @@ board:
   vendor: m5stack
   socs:
   - name: esp32s3
+    variants:
+    - name: se
+      cpucluster: procpu

boards/m5stack/m5stack_cores3/doc/index.rst

@@ -4,25 +4,27 @@ Overview
 ********
 
 M5Stack CoreS3 is an ESP32-based development board from M5Stack. It is the third generation of the M5Stack Core series.
+M5Stack CoreS3 SE is the compact version of CoreS3. It has the same form factor as the original M5Stack,
+and some features were reduced from CoreS3.
 
-M5Stack CoreS3 features consist of:
+M5Stack CoreS3/CoreS3 SE features consist of:
 
 - ESP32-S3 chip (dual-core Xtensa LX7 processor @240MHz, WIFI, OTG and CDC functions)
 - PSRAM 8MB
 - Flash 16MB
 - LCD ISP 2", 320x240 pixel ILI9342C
 - Capacitive multi touch FT6336U
-- Camera 30W pixel GC0308
 - Speaker 1W AW88298
 - Dual Microphones ES7210 Audio decoder
 - RTC BM8563
 - USB-C
 - SD-Card slot
-- Geomagnetic sensor BMM150
-- Proximity sensor LTR-553ALS-WA
-- 6-Axis IMU BMI270
 - PMIC AXP2101
-- Battery 500mAh 3.7 V
+- Battery 500mAh 3.7 V (Not available for CoreS3 SE)
+- Camera 30W pixel GC0308 (Not available for CoreS3 SE)
+- Geomagnetic sensor BMM150 (Not available for CoreS3 SE)
+- Proximity sensor LTR-553ALS-WA (Not available for CoreS3 SE)
+- 6-Axis IMU BMI270 (Not available for CoreS3 SE)
 
 Start Application Development
 *****************************
@@ -48,24 +50,145 @@ below to retrieve those files.
    It is recommended running the command above after :file:`west update`.
 
 Building & Flashing
--------------------
+*******************
+
+Simple boot
+===========
+
+The board could be loaded using the single binary image, without 2nd stage bootloader.
+It is the default option when building the application without additional configuration.
+
+.. note::
+
+   Simple boot does not provide any security features nor OTA updates.
+
+MCUboot bootloader
+==================
+
+User may choose to use MCUboot bootloader instead. In that case the bootloader
+must be built (and flashed) at least once.
+
+There are two options to be used when building an application:
+
+1. Sysbuild
+2. Manual build
+
+.. note::
+
+   User can select the MCUboot bootloader by adding the following line
+   to the board default configuration file.
+
+   .. code:: cfg
+
+      CONFIG_BOOTLOADER_MCUBOOT=y
+
+Sysbuild
+========
+
+The sysbuild makes possible to build and flash all necessary images needed to
+bootstrap the board with the ESP32 SoC.
+
+To build the sample application using sysbuild use the command:
+
+.. tabs::
+
+   .. group-tab:: M5Stack CoreS3
+
+      .. zephyr-app-commands::
+         :tool: west
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu
+         :goals: build
+         :west-args: --sysbuild
+         :compact:
+
+   .. group-tab:: M5Stack CoreS3 SE
+
+      .. zephyr-app-commands::
+         :tool: west
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu/se
+         :goals: build
+         :west-args: --sysbuild
+         :compact:
+
+By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
+images. But it can be configured to create other kind of images.
+
+Build directory structure created by sysbuild is different from traditional
+Zephyr build. Output is structured by the domain subdirectories:
+
+.. code-block::
+
+  build/
+  ├── hello_world
+  │   └── zephyr
+  │       ├── zephyr.elf
+  │       └── zephyr.bin
+  ├── mcuboot
+  │    └── zephyr
+  │       ├── zephyr.elf
+  │       └── zephyr.bin
+  └── domains.yaml
+
+.. note::
+
+   With ``--sysbuild`` option the bootloader will be re-build and re-flash
+   every time the pristine build is used.
+
+For more information about the system build please read the :ref:`sysbuild` documentation.
+
+Manual build
+============
+
+During the development cycle, it is intended to build & flash as quickly possible.
+For that reason, images can be built one at a time using traditional build.
+
+The instructions following are relevant for both manual build and sysbuild.
+The only difference is the structure of the build directory.
+
+.. note::
+
+   Remember that bootloader (MCUboot) needs to be flash at least once.
 
 Build and flash applications as usual (see :ref:`build_an_application` and
 :ref:`application_run` for more details).
 
-.. zephyr-app-commands::
-   :zephyr-app: samples/hello_world
-   :board: m5stack_cores3/esp32s3/procpu
-   :goals: build
+.. tabs::
+
+   .. group-tab:: M5Stack CoreS3
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu
+         :goals: build
+
+   .. group-tab:: M5Stack CoreS3 SE
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu/se
+         :goals: build
 
 The usual ``flash`` target will work with the ``m5stack_cores3/esp32s3/procpu`` board
 configuration. Here is an example for the :zephyr:code-sample:`hello_world`
 application.
 
-.. zephyr-app-commands::
-   :zephyr-app: samples/hello_world
-   :board: m5stack_cores3/esp32s3/procpu
-   :goals: flash
+.. tabs::
+
+   .. group-tab:: M5Stack CoreS3
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu
+         :goals: flash
+
+   .. group-tab:: M5Stack CoreS3 SE
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu/se
+         :goals: flash
 
 The baud rate of 921600bps is set by default. If experiencing issues when flashing,
 try using different values by using ``--esp-baud-rate <BAUD>`` option during
@@ -85,22 +208,59 @@ message in the monitor:
    *** Booting Zephyr OS build vx.x.x-xxx-gxxxxxxxxxxxx ***
    Hello World! m5stack_cores3/esp32s3/procpu
 
-
 Debugging
----------
+*********
 
 ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_.
 
 ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary.
 
 Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_.
 
+Here is an example for building the :zephyr:code-sample:`hello_world` application.
+
+.. tabs::
+
+   .. group-tab:: M5Stack CoreS3
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu
+         :goals: debug
+
+   .. group-tab:: M5Stack CoreS3 SE
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu/se
+         :goals: debug
+
+You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
+
+.. tabs::
+
+   .. group-tab:: M5Stack CoreS3
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu
+         :goals: debug
+
+   .. group-tab:: M5Stack CoreS3 SE
+
+      .. zephyr-app-commands::
+         :zephyr-app: samples/hello_world
+         :board: m5stack_cores3/esp32s3/procpu/se
+         :goals: debug
+
 References
 **********
 
 .. target-notes::
 
 .. _`M5Stack CoreS3 Documentation`: http://docs.m5stack.com/en/core/CoreS3
 .. _`M5Stack CoreS3 Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/datasheet/core/K128%20CoreS3/Sch_M5_CoreS3_v1.0.pdf
+.. _`M5Stack CoreS3 SE Documentation`: https://docs.m5stack.com/en/core/M5CoreS3%20SE
+.. _`M5Stack CoreS3 SE Schematic`: https://m5stack.oss-cn-shenzhen.aliyuncs.com/resource/docs/products/core/M5CORES3%20SE/M5_CoreS3SE.pdf
 .. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
 .. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/

boards/m5stack/m5stack_cores3/grove_connectors.dtsi

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2024 TOKITA Hiroshi
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	grove_header: grove_header {
+		compatible = "grove-header";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <0 0 &gpio0 1 0>,
+			   <1 0 &gpio0 2 0>;
+	};
+};
+
+grove_i2c: &i2c1 {};
+grove_uart: &uart2 {};

boards/m5stack/m5stack_cores3/m5stack_cores3-pinctrl.dtsi

@@ -20,6 +20,28 @@
 		};
 	};
 
+	uart1_default: uart1_default {
+		group1 {
+			pinmux = <UART1_TX_GPIO17>;
+			output-high;
+		};
+		group2 {
+			pinmux = <UART1_RX_GPIO18>;
+			bias-pull-up;
+		};
+	};
+
+	uart2_default: uart2_default {
+		group1 {
+			pinmux = <UART2_TX_GPIO2>;
+			output-high;
+		};
+		group2 {
+			pinmux = <UART2_RX_GPIO1>;
+			bias-pull-up;
+		};
+	};
+
 	spim2_default: spim2_default {
 		group1 {
 			pinmux = <SPIM2_MISO_GPIO35>,
@@ -40,4 +62,21 @@
 			output-high;
 		};
 	};
+
+	i2c1_default: i2c1_default {
+		group1 {
+			pinmux = <I2C1_SCL_GPIO1>,
+				 <I2C1_SDA_GPIO2>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	twai_default: twai_default {
+		group1 {
+			pinmux = <TWAI_TX_GPIO7>,
+				 <TWAI_RX_GPIO6>;
+		};
+	};
 };