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modules: hal_nordic: Add multi-instance DPPI and PPIB drivers #79857

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Merged
merged 5 commits into from
Nov 19, 2024
Merged

modules: hal_nordic: Add multi-instance DPPI and PPIB drivers #79857

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7d0bb13
manifest: update hal_nordic revision
e-rk Oct 15, 2024
5493079
dts: nordic: 54l: Add PPIB device tree nodes and bindings
e-rk Oct 15, 2024
9e1fe34
modules: hal_nordic: Enable nrfx_ppib drivers
e-rk Oct 15, 2024
ab861fd
modules: hal_nordic: rework resource reservations
e-rk Oct 21, 2024
895b8bc
modules: hal_nordic: add NRFX_GPPI config
e-rk Oct 22, 2024
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11 changes: 7 additions & 4 deletions drivers/counter/counter_nrfx_rtc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -387,15 +387,17 @@ static int ppi_setup(const struct device *dev, uint8_t chan)

nrfy_rtc_event_enable(rtc, NRF_RTC_CHANNEL_INT_MASK(chan));
#ifdef DPPI_PRESENT
result = nrfx_dppi_channel_alloc(&data->ppi_ch);
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);
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I think it would be nice to add a comment that instance 0 is used here because COUNTER_RTC_WITH_PPI_WRAP is currently only supported for nRF51/52/53/91 Series.

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I'll try to add this in a follow up commit.


result = nrfx_dppi_channel_alloc(&dppi, &data->ppi_ch);
if (result != NRFX_SUCCESS) {
ERR("Failed to allocate PPI channel.");
return -ENODEV;
}

nrfy_rtc_subscribe_set(rtc, NRF_RTC_TASK_CLEAR, data->ppi_ch);
nrfy_rtc_publish_set(rtc, evt, data->ppi_ch);
(void)nrfx_dppi_channel_enable(data->ppi_ch);
(void)nrfx_dppi_channel_enable(&dppi, data->ppi_ch);
#else /* DPPI_PRESENT */
uint32_t evt_addr;
uint32_t task_addr;
Expand Down Expand Up @@ -429,11 +431,12 @@ static void ppi_free(const struct device *dev, uint8_t chan)
nrfy_rtc_event_disable(rtc, NRF_RTC_CHANNEL_INT_MASK(chan));
#ifdef DPPI_PRESENT
nrf_rtc_event_t evt = NRF_RTC_CHANNEL_EVENT_ADDR(chan);
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);

(void)nrfx_dppi_channel_disable(ppi_ch);
(void)nrfx_dppi_channel_disable(&dppi, ppi_ch);
nrfy_rtc_subscribe_clear(rtc, NRF_RTC_TASK_CLEAR);
nrfy_rtc_publish_clear(rtc, evt);
(void)nrfx_dppi_channel_free(ppi_ch);
(void)nrfx_dppi_channel_free(&dppi, ppi_ch);
#else /* DPPI_PRESENT */
(void)nrfx_ppi_channel_disable(ppi_ch);
(void)nrfx_ppi_channel_free(ppi_ch);
Expand Down
3 changes: 1 addition & 2 deletions drivers/pwm/Kconfig.nrf_sw
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Expand Up @@ -8,8 +8,7 @@ config PWM_NRF_SW
default y
depends on DT_HAS_NORDIC_NRF_SW_PWM_ENABLED
select NRFX_GPIOTE
select NRFX_PPI if HAS_HW_NRF_PPI
select NRFX_DPPI if HAS_HW_NRF_DPPIC
select NRFX_GPPI
help
Enable driver to utilize PWM on the Nordic Semiconductor nRF SoCs.

Expand Down
6 changes: 2 additions & 4 deletions drivers/serial/Kconfig.nrfx_uart_instance
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Expand Up @@ -24,8 +24,7 @@ config UART_$(nrfx_uart_num)_ENHANCED_POLL_OUT
default y
depends on HAS_HW_NRF_UARTE$(nrfx_uart_num)
depends on HAS_HW_NRF_PPI || HAS_HW_NRF_DPPIC
select NRFX_PPI if HAS_HW_NRF_PPI
select NRFX_DPPI if HAS_HW_NRF_DPPIC
select NRFX_GPPI
help
When enabled, polling out does not trigger interrupt which stops TX.
Feature uses a PPI channel.
Expand Down Expand Up @@ -55,8 +54,7 @@ config UART_$(nrfx_uart_num)_NRF_HW_ASYNC
depends on UART_ASYNC_API
depends on UART_NRFX_UARTE_LEGACY_SHIM
depends on HAS_HW_NRF_PPI || HAS_HW_NRF_DPPIC
select NRFX_PPI if HAS_HW_NRF_PPI
select NRFX_DPPI if HAS_HW_NRF_DPPIC
select NRFX_GPPI
help
If default driver uses interrupts to count incoming bytes, it is possible
that with higher speeds and/or high cpu load some data can be lost.
Expand Down
13 changes: 13 additions & 0 deletions dts/bindings/misc/nordic,nrf-ppib.yaml
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@@ -0,0 +1,13 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

description: |
Nordic PPIB (Programmable Peripheral Interconnect Bridge)

compatible: "nordic,nrf-ppib"

include: base.yaml

properties:
reg:
required: true
48 changes: 48 additions & 0 deletions dts/common/nordic/nrf54l15.dtsi
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Expand Up @@ -113,6 +113,18 @@
status = "disabled";
};

ppib00: ppib@43000 {
compatible = "nordic,nrf-ppib";
reg = <0x43000 0x1000>;
status = "disabled";
};

ppib01: ppib@44000 {
compatible = "nordic,nrf-ppib";
reg = <0x44000 0x1000>;
status = "disabled";
};

spi00: spi@4a000 {
/*
* This spi node can be either SPIM or SPIS,
Expand Down Expand Up @@ -186,6 +198,18 @@
status = "disabled";
};

ppib10: ppib@83000 {
compatible = "nordic,nrf-ppib";
reg = <0x83000 0x1000>;
status = "disabled";
};

ppib11: ppib@84000 {
compatible = "nordic,nrf-ppib";
reg = <0x84000 0x1000>;
status = "disabled";
};

timer10: timer@85000 {
compatible = "nordic,nrf-timer";
status = "disabled";
Expand Down Expand Up @@ -235,6 +259,24 @@
status = "disabled";
};

ppib20: ppib@c3000 {
compatible = "nordic,nrf-ppib";
reg = <0xc3000 0x1000>;
status = "disabled";
};

ppib21: ppib@c4000 {
compatible = "nordic,nrf-ppib";
reg = <0xc4000 0x1000>;
status = "disabled";
};

ppib22: ppib@c5000 {
compatible = "nordic,nrf-ppib";
reg = <0xc5000 0x1000>;
status = "disabled";
};

i2c20: i2c@c6000 {
compatible = "nordic,nrf-twim";
#address-cells = <1>;
Expand Down Expand Up @@ -523,6 +565,12 @@
status = "disabled";
};

ppib30: ppib@103000 {
compatible = "nordic,nrf-ppib";
reg = <0x103000 0x1000>;
status = "disabled";
};

i2c30: i2c@104000 {
compatible = "nordic,nrf-twim";
#address-cells = <1>;
Expand Down
48 changes: 48 additions & 0 deletions dts/common/nordic/nrf54l20.dtsi
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Expand Up @@ -82,6 +82,18 @@
status = "disabled";
};

ppib00: ppib@44000 {
compatible = "nordic,nrf-ppib";
reg = <0x44000 0x1000>;
status = "disabled";
};

ppib01: ppib@45000 {
compatible = "nordic,nrf-ppib";
reg = <0x45000 0x1000>;
status = "disabled";
};

spi00: spi@4d000 {
/*
* This spi node can be either SPIM or SPIS,
Expand Down Expand Up @@ -137,6 +149,18 @@
status = "disabled";
};

ppib10: ppib@83000 {
compatible = "nordic,nrf-ppib";
reg = <0x83000 0x1000>;
status = "disabled";
};

ppib11: ppib@84000 {
compatible = "nordic,nrf-ppib";
reg = <0x84000 0x1000>;
status = "disabled";
};

timer10: timer@85000 {
compatible = "nordic,nrf-timer";
status = "disabled";
Expand Down Expand Up @@ -185,6 +209,24 @@
status = "disabled";
};

ppib20: ppib@c3000 {
compatible = "nordic,nrf-ppib";
reg = <0xc3000 0x1000>;
status = "disabled";
};

ppib21: ppib@c4000 {
compatible = "nordic,nrf-ppib";
reg = <0xc4000 0x1000>;
status = "disabled";
};

ppib22: ppib@c5000 {
compatible = "nordic,nrf-ppib";
reg = <0xc5000 0x1000>;
status = "disabled";
};

i2c20: i2c@c6000 {
compatible = "nordic,nrf-twim";
#address-cells = <1>;
Expand Down Expand Up @@ -464,6 +506,12 @@
status = "disabled";
};

ppib30: ppib@103000 {
compatible = "nordic,nrf-ppib";
reg = <0x103000 0x1000>;
status = "disabled";
};

i2c30: i2c@104000 {
compatible = "nordic,nrf-twim";
#address-cells = <1>;
Expand Down
5 changes: 3 additions & 2 deletions modules/hal_nordic/nrfx/CMakeLists.txt
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Expand Up @@ -101,7 +101,7 @@ zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF92X ${MDK_DIR}/system_nrf92.c
zephyr_library_sources(nrfx_glue.c)
zephyr_library_sources(${HELPERS_DIR}/nrfx_flag32_allocator.c)
zephyr_library_sources_ifdef(CONFIG_RETAINED_MEM_NRF_RAM_CTRL ${HELPERS_DIR}/nrfx_ram_ctrl.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_DPPI ${HELPERS_DIR}/nrfx_gppi_dppi.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI ${HELPERS_DIR}/nrfx_gppi_dppi.c)
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This does not seem to be necessary/beneficial.

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Can you elaborate? Do you mean that CONFIG_NRFX_GPPI kconfig is not beneficial or something else?

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NRFX_GPPI enables NRFX_DPPI, so the change is not really needed. But it causes that nrfx_gppi_dppi.c will be compiled also for NRFX_PPI, unnecessarily.

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It is possible to enable NRFX_DPPI without enabling any GPPI functionality now. Also NRFX_GPPI does more, as it is unified across the SoC families. Regardless of whether working with nRF52 or nRF54L or anything else, NRFX_GPPI will enable everything that's needed.

I just noticed that that NRFX_PPI in the next line should be replaced with NRFX_GPPI as well. I'll add this subsequent commit as well, if you don't mind.

zephyr_library_sources_ifdef(CONFIG_NRFX_PPI ${HELPERS_DIR}/nrfx_gppi_ppi.c)

zephyr_library_sources_ifdef(CONFIG_NRFX_PRS ${SRC_DIR}/prs/nrfx_prs.c)
Expand All @@ -121,6 +121,7 @@ zephyr_library_sources_ifdef(CONFIG_NRFX_NVMC ${SRC_DIR}/nrfx_nvmc.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_PDM ${SRC_DIR}/nrfx_pdm.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_POWER ${SRC_DIR}/nrfx_power.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_PPI ${SRC_DIR}/nrfx_ppi.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_PPIB ${SRC_DIR}/nrfx_ppib.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_PWM ${SRC_DIR}/nrfx_pwm.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_QDEC ${SRC_DIR}/nrfx_qdec.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_QSPI ${SRC_DIR}/nrfx_qspi.c)
Expand Down Expand Up @@ -184,7 +185,7 @@ if(CONFIG_SOC_NRF54L20_ENGA_CPUAPP)
zephyr_compile_definitions(NRF_SKIP_TAMPC_SETUP)
endif()

if(CONFIG_SOC_SERIES_NRF54LX AND CONFIG_NRFX_DPPI)
if(CONFIG_SOC_SERIES_NRF54LX AND CONFIG_NRFX_GPPI)
zephyr_library_sources(${HELPERS_DIR}/nrfx_gppi_dppi_ppib_lumos.c)
zephyr_library_sources(${NRFX_DIR}/soc/interconnect/dppic_ppib/nrfx_interconnect_dppic_ppib.c)
endif()
Expand Down
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