soc: st: stm32: stm32wbax: STM32WBA Cube 1.4.1 FW integration

soc/st/stm32/stm32wbax/CMakeLists.txt

@@ -12,10 +12,10 @@ zephyr_sources_ifdef(CONFIG_PM
 if(CONFIG_BT_STM32WBA)
   zephyr_include_directories(hci_if)
 
-  zephyr_sources(hci_if/linklayer_plat.c)
+  zephyr_sources(hci_if/linklayer_plat_adapt.c)
   zephyr_sources(hci_if/bleplat.c)
   zephyr_sources(hci_if/host_stack_if.c)
-  zephyr_sources(hci_if/ll_sys_if.c)
+  zephyr_sources(hci_if/ll_sys_if_adapt.c)
   zephyr_sources(hci_if/stm32_timer.c)
 endif()
 

soc/st/stm32/stm32wbax/Kconfig

@@ -14,5 +14,6 @@ config SOC_SERIES_STM32WBAX
 	select CPU_CORTEX_M_HAS_DWT
 	select HAS_STM32CUBE
 	select USE_STM32_HAL_PWR_EX
+	select USE_STM32_HAL_CORTEX
 	select HAS_PM
 	select SOC_EARLY_INIT_HOOK

soc/st/stm32/stm32wbax/hci_if/linklayer_plat.c → soc/st/stm32/stm32wbax/hci_if/linklayer_plat_adapt.c

@@ -4,29 +4,21 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr/irq.h>
 #include <zephyr/kernel.h>
-#include <zephyr/arch/cpu.h>
-#include <zephyr/sys/util.h>
 #include <zephyr/drivers/entropy.h>
 #include <zephyr/logging/log.h>
-#include <cmsis_core.h>
-
-#include <linklayer_plat_local.h>
-
-#include <stm32_ll_pwr.h>
 
 #include "scm.h"
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
-LOG_MODULE_REGISTER(linklayer_plat);
+LOG_MODULE_REGISTER(linklayer_plat_adapt);
 
 #define RADIO_INTR_PRIO_HIGH_Z (RADIO_INTR_PRIO_HIGH + _IRQ_PRIO_OFFSET)
 #define RADIO_INTR_PRIO_LOW_Z (RADIO_INTR_PRIO_LOW + _IRQ_PRIO_OFFSET)
 
 /* 2.4GHz RADIO ISR callbacks */
 typedef void (*radio_isr_cb_t) (void);
 
 radio_isr_cb_t radio_callback;
 radio_isr_cb_t low_isr_callback;
 
@@ -36,52 +28,17 @@
 volatile int32_t prio_high_isr_counter;
 volatile int32_t prio_low_isr_counter;
 volatile int32_t prio_sys_isr_counter;
-volatile int32_t irq_counter;
 volatile uint32_t local_basepri_value;
 
 /* Radio SW low ISR global variable */
 volatile uint8_t radio_sw_low_isr_is_running_high_prio;
 
-void LINKLAYER_PLAT_ClockInit(void)
-{
-	LL_PWR_EnableBkUpAccess();
-
-	/* Select LSE as Sleep CLK */
-	__HAL_RCC_RADIOSLPTIM_CONFIG(RCC_RADIOSTCLKSOURCE_LSE);
-
-	LL_PWR_DisableBkUpAccess();
-
-	/* Enable AHB5ENR peripheral clock (bus CLK) */
-	__HAL_RCC_RADIO_CLK_ENABLE();
-}
 
 void LINKLAYER_PLAT_DelayUs(uint32_t delay)
 {
 	k_busy_wait(delay);
 }
 
-void LINKLAYER_PLAT_WaitHclkRdy(void)
-{
-	while (HAL_RCCEx_GetRadioBusClockReadiness() != RCC_RADIO_BUS_CLOCK_READY) {
-	}
-}
-
-void LINKLAYER_PLAT_AclkCtrl(uint8_t enable)
-{
-	LOG_DBG("enable: %d", enable);
-	if (enable) {
-		/* Enable RADIO baseband clock (active CLK) */
-		HAL_RCCEx_EnableRadioBBClock();
-
-		/* Polling on HSE32 activation */
-		while (LL_RCC_HSE_IsReady() == 0) {
-		}
-	} else {
-		/* Disable RADIO baseband clock (active CLK) */
-		HAL_RCCEx_DisableRadioBBClock();
-	}
-}
-
 void LINKLAYER_PLAT_GetRNG(uint8_t *ptr_rnd, uint32_t len)
 {
 	int ret;
@@ -124,7 +81,7 @@
 	/* Check if nested SW radio low interrupt has been requested*/
 	if (radio_sw_low_isr_is_running_high_prio != 0) {
 		NVIC_SetPriority((IRQn_Type) RADIO_SW_LOW_INTR_NUM, RADIO_INTR_PRIO_LOW);
 		radio_sw_low_isr_is_running_high_prio = 0;
 	}
 
 	/* Re-enable SW radio low interrupt */
@@ -134,7 +91,7 @@
 }
 
 
 void link_layer_register_isr(void)
 {
 	ARM_IRQ_DIRECT_DYNAMIC_CONNECT(RADIO_INTR_NUM, 0, 0, reschedule);
 
@@ -157,7 +114,7 @@
 	irq_enable((IRQn_Type)RADIO_SW_LOW_INTR_NUM);
 }
 
 
 void LINKLAYER_PLAT_TriggerSwLowIT(uint8_t priority)
 {
 	uint8_t low_isr_priority = RADIO_INTR_PRIO_LOW_Z;
@@ -191,22 +148,6 @@
 	NVIC_SetPendingIRQ((IRQn_Type)RADIO_SW_LOW_INTR_NUM);
 }
 
-void LINKLAYER_PLAT_EnableIRQ(void)
-{
-	irq_counter = MAX(0, irq_counter - 1);
-
-	if (irq_counter == 0) {
-		__enable_irq();
-	}
-}
-
-void LINKLAYER_PLAT_DisableIRQ(void)
-{
-	__disable_irq();
-
-	irq_counter++;
-}
-
 void LINKLAYER_PLAT_Assert(uint8_t condition)
 {
 	__ASSERT_NO_MSG(condition);
@@ -267,16 +208,6 @@
 	}
 }
 
-void LINKLAYER_PLAT_EnableRadioIT(void)
-{
-	irq_enable((IRQn_Type)RADIO_INTR_NUM);
-}
-
-void LINKLAYER_PLAT_DisableRadioIT(void)
-{
-	irq_disable((IRQn_Type)RADIO_INTR_NUM);
-}
-
 void LINKLAYER_PLAT_StartRadioEvt(void)
 {
 	__HAL_RCC_RADIO_CLK_SLEEP_ENABLE();
@@ -314,3 +245,3 @@
 void LINKLAYER_PLAT_EnableOSContextSwitch(void) {}
 
 void LINKLAYER_PLAT_DisableOSContextSwitch(void) {}

soc/st/stm32/stm32wbax/hci_if/ll_sys_if.c → soc/st/stm32/stm32wbax/hci_if/ll_sys_if_adapt.c

@@ -8,12 +8,9 @@
 
 #include <zephyr/logging/log.h>
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
-LOG_MODULE_REGISTER(ll_sys_if);
+LOG_MODULE_REGISTER(ll_sys_if_adapt);
 
-#include "ll_intf.h"
 #include "ll_sys.h"
-#include "linklayer_plat.h"
-#include "app_conf.h"
 
 extern struct k_mutex ble_ctlr_stack_mutex;
 extern struct k_work_q ll_work_q;
@@ -40,8 +37,3 @@ void ll_sys_bg_process_init(void)
 {
 	k_work_init(&ll_sys_work, &ll_sys_bg_process_handler);
 }
-
-void ll_sys_config_params(void)
-{
-	ll_intf_config_ll_ctx_params(USE_RADIO_LOW_ISR, NEXT_EVENT_SCHEDULING_FROM_ISR);
-}

west.yml

@@ -233,7 +233,7 @@ manifest:
       groups:
         - hal
     - name: hal_stm32
-      revision: 6f0e5f70cb540c487e3e3678af2e95d0937f9863
+      revision: 019d8255333f96bdd47d26b44049bd3e7af8ef55
       path: modules/hal/stm32
       groups:
         - hal