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6 changes: 6 additions & 0 deletions arch/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -1148,3 +1148,9 @@ config ARCH_HAS_CUSTOM_BUSY_WAIT
It's possible that an architecture port cannot or does not want to use
the provided k_busy_wait(), but instead must do something custom. It must
enable this option in that case.

config ARCH_HAS_CUSTOM_CURRENT_IMPL
bool
help
Select when architecture implements arch_current_thread() &
arch_current_thread_set().
2 changes: 1 addition & 1 deletion arch/arc/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -262,7 +262,7 @@ config ARC_CURRENT_THREAD_USE_NO_TLS
RGF_NUM_BANKS the parameter is disabled by-default because banks syncronization
requires significant time, and it slows down performance.
ARCMWDT works with tls pointer in different way then GCC. Optimized access to
TLS pointer via _current variable does not provide significant advantages
TLS pointer via arch_current_thread() does not provide significant advantages
in case of MetaWare.

config GEN_ISR_TABLES
Expand Down
2 changes: 1 addition & 1 deletion arch/arc/core/fault.c
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ static bool z_check_thread_stack_fail(const uint32_t fault_addr, uint32_t sp)
{
#if defined(CONFIG_MULTITHREADING)
uint32_t guard_end, guard_start;
const struct k_thread *thread = _current;
const struct k_thread *thread = arch_current_thread();

if (!thread) {
/* TODO: Under what circumstances could we get here ? */
Expand Down
4 changes: 2 additions & 2 deletions arch/arc/core/irq_offload.c
Original file line number Diff line number Diff line change
Expand Up @@ -49,8 +49,8 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)

__asm__ volatile("sync");

/* If _current was aborted in the offload routine, we shouldn't be here */
__ASSERT_NO_MSG((_current->base.thread_state & _THREAD_DEAD) == 0);
/* If arch_current_thread() was aborted in the offload routine, we shouldn't be here */
__ASSERT_NO_MSG((arch_current_thread()->base.thread_state & _THREAD_DEAD) == 0);
}

/* need to be executed on every core in the system */
Expand Down
16 changes: 8 additions & 8 deletions arch/arc/core/thread.c
Original file line number Diff line number Diff line change
Expand Up @@ -210,7 +210,7 @@
#ifdef CONFIG_MULTITHREADING
void *z_arch_get_next_switch_handle(struct k_thread **old_thread)
{
*old_thread = _current;
*old_thread = arch_current_thread();

return z_get_next_switch_handle(NULL);
}
Expand All @@ -227,17 +227,17 @@
FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
void *p1, void *p2, void *p3)
{
setup_stack_vars(_current);
setup_stack_vars(arch_current_thread());

/* possible optimizaiton: no need to load mem domain anymore */
/* need to lock cpu here ? */
configure_mpu_thread(_current);
configure_mpu_thread(arch_current_thread());

z_arc_userspace_enter(user_entry, p1, p2, p3,
(uint32_t)_current->stack_info.start,
(_current->stack_info.size -
_current->stack_info.delta), _current);
(uint32_t)arch_current_thread()->stack_info.start,
(arch_current_thread()->stack_info.size -
arch_current_thread()->stack_info.delta), arch_current_thread());
CODE_UNREACHABLE;

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arch/arc/core/thread.c:240 - z_arc_userspace_enter(user_entry, p1, p2, p3, - (uint32_t)arch_current_thread()->stack_info.start, - (arch_current_thread()->stack_info.size - - arch_current_thread()->stack_info.delta), arch_current_thread()); + z_arc_userspace_enter( + user_entry, p1, p2, p3, (uint32_t)arch_current_thread()->stack_info.start, + (arch_current_thread()->stack_info.size - arch_current_thread()->stack_info.delta), + arch_current_thread());
}
#endif

Expand Down Expand Up @@ -336,7 +336,7 @@

id = _current_cpu->id;
#if (CONFIG_MP_MAX_NUM_CPUS > 1) && defined(CONFIG_SCHED_CPU_MASK)
__ASSERT(!arch_is_in_isr() && (_current->base.cpu_mask == BIT(id)), "");
__ASSERT(!arch_is_in_isr() && (arch_current_thread()->base.cpu_mask == BIT(id)), "");
#endif
k_spin_unlock(&lock, key);

Expand All @@ -355,7 +355,7 @@

key = k_spin_lock(&lock);
#if (CONFIG_MP_MAX_NUM_CPUS > 1) && defined(CONFIG_SCHED_CPU_MASK)
__ASSERT(!arch_is_in_isr() && (_current->base.cpu_mask == BIT(id)), "");
__ASSERT(!arch_is_in_isr() && (arch_current_thread()->base.cpu_mask == BIT(id)), "");
#endif
id = _current_cpu->id;
k_spin_unlock(&lock, key);
Expand Down
2 changes: 1 addition & 1 deletion arch/arc/core/tls.c
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@ size_t arch_tls_stack_setup(struct k_thread *new_thread, char *stack_ptr)

void *_Preserve_flags _mwget_tls(void)
{
return (void *)(_current->tls);
return (void *)(arch_current_thread()->tls);
}

#else
Expand Down
4 changes: 2 additions & 2 deletions arch/arm/core/cortex_a_r/fault.c
Original file line number Diff line number Diff line change
Expand Up @@ -178,10 +178,10 @@
* context because it is about to be overwritten.
*/
if (((_current_cpu->nested == 2)
&& (_current->base.user_options & K_FP_REGS))
&& (arch_current_thread()->base.user_options & K_FP_REGS))
|| ((_current_cpu->nested > 2)
&& (spill_esf->undefined & FPEXC_EN))) {
/*

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arch/arm/core/cortex_a_r/fault.c:184 - if (((_current_cpu->nested == 2) - && (arch_current_thread()->base.user_options & K_FP_REGS)) - || ((_current_cpu->nested > 2) - && (spill_esf->undefined & FPEXC_EN))) { + if (((_current_cpu->nested == 2) && + (arch_current_thread()->base.user_options & K_FP_REGS)) || + ((_current_cpu->nested > 2) && (spill_esf->undefined & FPEXC_EN))) {
* Spill VFP registers to specified exception stack
* frame
*/
Expand All @@ -196,7 +196,7 @@
* means that a thread that uses the VFP does not have to,
* but should, set K_FP_REGS on thread creation.
*/
_current->base.user_options |= K_FP_REGS;
arch_current_thread()->base.user_options |= K_FP_REGS;
}

return false;
Expand Down
6 changes: 3 additions & 3 deletions arch/arm/core/cortex_a_r/swap.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,14 +17,14 @@
int arch_swap(unsigned int key)
{
/* store off key and return value */
_current->arch.basepri = key;
_current->arch.swap_return_value = -EAGAIN;
arch_current_thread()->arch.basepri = key;
arch_current_thread()->arch.swap_return_value = -EAGAIN;

z_arm_cortex_r_svc();
irq_unlock(key);

/* Context switch is performed here. Returning implies the
* thread has been context-switched-in again.
*/
return _current->arch.swap_return_value;
return arch_current_thread()->arch.swap_return_value;
}
4 changes: 2 additions & 2 deletions arch/arm/core/cortex_a_r/swap_helper.S
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ SECTION_FUNC(TEXT, z_arm_do_swap)

#if defined(CONFIG_FPU_SHARING)
ldrb r0, [r2, #_thread_offset_to_user_options]
tst r0, #K_FP_REGS /* _current->base.user_options & K_FP_REGS */
tst r0, #K_FP_REGS /* arch_current_thread()->base.user_options & K_FP_REGS */
beq out_fp_inactive

mov ip, #FPEXC_EN
Expand Down Expand Up @@ -152,7 +152,7 @@ out_fp_inactive:

#if defined(CONFIG_FPU_SHARING)
ldrb r0, [r2, #_thread_offset_to_user_options]
tst r0, #K_FP_REGS /* _current->base.user_options & K_FP_REGS */
tst r0, #K_FP_REGS /* arch_current_thread()->base.user_options & K_FP_REGS */
beq in_fp_inactive

mov r3, #FPEXC_EN
Expand Down
36 changes: 18 additions & 18 deletions arch/arm/core/cortex_a_r/thread.c
Original file line number Diff line number Diff line change
Expand Up @@ -198,8 +198,8 @@
{

/* Set up privileged stack before entering user mode */
_current->arch.priv_stack_start =
(uint32_t)z_priv_stack_find(_current->stack_obj);
arch_current_thread()->arch.priv_stack_start =
(uint32_t)z_priv_stack_find(arch_current_thread()->stack_obj);
#if defined(CONFIG_MPU_STACK_GUARD)
#if defined(CONFIG_THREAD_STACK_INFO)
/* We're dropping to user mode which means the guard area is no
Expand All @@ -208,38 +208,38 @@
* which accounted for memory borrowed from the thread stack.
*/
#if FP_GUARD_EXTRA_SIZE > 0
if ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) {
_current->stack_info.start -= FP_GUARD_EXTRA_SIZE;
_current->stack_info.size += FP_GUARD_EXTRA_SIZE;
if ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) {
arch_current_thread()->stack_info.start -= FP_GUARD_EXTRA_SIZE;
arch_current_thread()->stack_info.size += FP_GUARD_EXTRA_SIZE;
}
#endif /* FP_GUARD_EXTRA_SIZE */
_current->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE;
_current->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE;
arch_current_thread()->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE;
arch_current_thread()->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_THREAD_STACK_INFO */

/* Stack guard area reserved at the bottom of the thread's
* privileged stack. Adjust the available (writable) stack
* buffer area accordingly.
*/
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
_current->arch.priv_stack_start +=
((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
arch_current_thread()->arch.priv_stack_start +=
((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else

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arch/arm/core/cortex_a_r/thread.c:228 - ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? - MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) + ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT + : MPU_GUARD_ALIGN_AND_SIZE;
_current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
arch_current_thread()->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
#endif /* CONFIG_MPU_STACK_GUARD */

#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
_current->arch.priv_stack_end =
_current->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE;
arch_current_thread()->arch.priv_stack_end =
arch_current_thread()->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE;
#endif

z_arm_userspace_enter(user_entry, p1, p2, p3,
(uint32_t)_current->stack_info.start,
_current->stack_info.size -
_current->stack_info.delta);
(uint32_t)arch_current_thread()->stack_info.start,
arch_current_thread()->stack_info.size -
arch_current_thread()->stack_info.delta);
CODE_UNREACHABLE;

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arch/arm/core/cortex_a_r/thread.c:242 - z_arm_userspace_enter(user_entry, p1, p2, p3, - (uint32_t)arch_current_thread()->stack_info.start, - arch_current_thread()->stack_info.size - - arch_current_thread()->stack_info.delta); + z_arm_userspace_enter( + user_entry, p1, p2, p3, (uint32_t)arch_current_thread()->stack_info.start, + arch_current_thread()->stack_info.size - arch_current_thread()->stack_info.delta);
}

bool z_arm_thread_is_in_user_mode(void)
Expand Down Expand Up @@ -304,7 +304,7 @@
uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp)
{
#if defined(CONFIG_MULTITHREADING)
const struct k_thread *thread = _current;
const struct k_thread *thread = arch_current_thread();

if (thread == NULL) {
return 0;
Expand All @@ -314,9 +314,9 @@
#if (defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)) && \
defined(CONFIG_MPU_STACK_GUARD)
uint32_t guard_len =
((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else

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arch/arm/core/cortex_a_r/thread.c:319 - ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? - MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) + ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT + : MPU_GUARD_ALIGN_AND_SIZE;
/* If MPU_STACK_GUARD is not enabled, the guard length is
* effectively zero. Stack overflows may be detected only
* for user threads in nPRIV mode.
Expand Down Expand Up @@ -377,7 +377,7 @@
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
int arch_float_disable(struct k_thread *thread)
{
if (thread != _current) {
if (thread != arch_current_thread()) {
return -EINVAL;
}

Expand Down
6 changes: 3 additions & 3 deletions arch/arm/core/cortex_m/swap.c
Original file line number Diff line number Diff line change
Expand Up @@ -33,8 +33,8 @@
int arch_swap(unsigned int key)
{
/* store off key and return value */
_current->arch.basepri = key;
_current->arch.swap_return_value = -EAGAIN;
arch_current_thread()->arch.basepri = key;
arch_current_thread()->arch.swap_return_value = -EAGAIN;

/* set pending bit to make sure we will take a PendSV exception */
SCB->ICSR |= SCB_ICSR_PENDSVSET_Msk;
Expand All @@ -45,5 +45,5 @@ int arch_swap(unsigned int key)
/* Context switch is performed here. Returning implies the
* thread has been context-switched-in again.
*/
return _current->arch.swap_return_value;
return arch_current_thread()->arch.swap_return_value;
}
2 changes: 1 addition & 1 deletion arch/arm/core/cortex_m/swap_helper.S
Original file line number Diff line number Diff line change
Expand Up @@ -288,7 +288,7 @@ in_fp_endif:
#if defined(CONFIG_MPU_STACK_GUARD) || defined(CONFIG_USERSPACE)
/* Re-program dynamic memory map */
push {r2,lr}
mov r0, r2 /* _current thread */
mov r0, r2 /* arch_current_thread() thread */
bl z_arm_configure_dynamic_mpu_regions
pop {r2,lr}
#endif
Expand Down
34 changes: 17 additions & 17 deletions arch/arm/core/cortex_m/thread.c
Original file line number Diff line number Diff line change
Expand Up @@ -231,8 +231,8 @@
{

/* Set up privileged stack before entering user mode */
_current->arch.priv_stack_start =
(uint32_t)z_priv_stack_find(_current->stack_obj);
arch_current_thread()->arch.priv_stack_start =
(uint32_t)z_priv_stack_find(arch_current_thread()->stack_obj);
#if defined(CONFIG_MPU_STACK_GUARD)
#if defined(CONFIG_THREAD_STACK_INFO)
/* We're dropping to user mode which means the guard area is no
Expand All @@ -241,33 +241,33 @@
* which accounted for memory borrowed from the thread stack.
*/
#if FP_GUARD_EXTRA_SIZE > 0
if ((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) {
_current->stack_info.start -= FP_GUARD_EXTRA_SIZE;
_current->stack_info.size += FP_GUARD_EXTRA_SIZE;
if ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) {
arch_current_thread()->stack_info.start -= FP_GUARD_EXTRA_SIZE;
arch_current_thread()->stack_info.size += FP_GUARD_EXTRA_SIZE;
}
#endif /* FP_GUARD_EXTRA_SIZE */
_current->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE;
_current->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE;
arch_current_thread()->stack_info.start -= MPU_GUARD_ALIGN_AND_SIZE;
arch_current_thread()->stack_info.size += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_THREAD_STACK_INFO */

/* Stack guard area reserved at the bottom of the thread's
* privileged stack. Adjust the available (writable) stack
* buffer area accordingly.
*/
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
_current->arch.priv_stack_start +=
((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
arch_current_thread()->arch.priv_stack_start +=
((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else
_current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
arch_current_thread()->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE;
#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
#endif /* CONFIG_MPU_STACK_GUARD */

z_arm_userspace_enter(user_entry, p1, p2, p3,
(uint32_t)_current->stack_info.start,
_current->stack_info.size -
_current->stack_info.delta);
(uint32_t)arch_current_thread()->stack_info.start,
arch_current_thread()->stack_info.size -
arch_current_thread()->stack_info.delta);
CODE_UNREACHABLE;

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arch/arm/core/cortex_m/thread.c:270 - ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? - MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) + ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT + : MPU_GUARD_ALIGN_AND_SIZE; #else arch_current_thread()->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE; #endif /* CONFIG_FPU && CONFIG_FPU_SHARING */ #endif /* CONFIG_MPU_STACK_GUARD */ - z_arm_userspace_enter(user_entry, p1, p2, p3, - (uint32_t)arch_current_thread()->stack_info.start, - arch_current_thread()->stack_info.size - - arch_current_thread()->stack_info.delta); + z_arm_userspace_enter( + user_entry, p1, p2, p3, (uint32_t)arch_current_thread()->stack_info.start, + arch_current_thread()->stack_info.size - arch_current_thread()->stack_info.delta);
}


Expand Down Expand Up @@ -379,7 +379,7 @@
uint32_t z_check_thread_stack_fail(const uint32_t fault_addr, const uint32_t psp)
{
#if defined(CONFIG_MULTITHREADING)
const struct k_thread *thread = _current;
const struct k_thread *thread = arch_current_thread();

if (thread == NULL) {
return 0;
Expand All @@ -389,9 +389,9 @@
#if (defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)) && \
defined(CONFIG_MPU_STACK_GUARD)
uint32_t guard_len =
((_current->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ?
MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE;
#else

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arch/arm/core/cortex_m/thread.c:394 - ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) ? - MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; + ((arch_current_thread()->arch.mode & Z_ARM_MODE_MPU_GUARD_FLOAT_Msk) != 0) + ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT + : MPU_GUARD_ALIGN_AND_SIZE;
/* If MPU_STACK_GUARD is not enabled, the guard length is
* effectively zero. Stack overflows may be detected only
* for user threads in nPRIV mode.
Expand Down Expand Up @@ -452,7 +452,7 @@
#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING)
int arch_float_disable(struct k_thread *thread)
{
if (thread != _current) {
if (thread != arch_current_thread()) {
return -EINVAL;
}

Expand Down Expand Up @@ -522,7 +522,7 @@
{
z_arm_prepare_switch_to_main();

_current = main_thread;
arch_current_thread_set(main_thread);

#if defined(CONFIG_THREAD_LOCAL_STORAGE)
/* On Cortex-M, TLS uses a global variable as pointer to
Expand Down
2 changes: 1 addition & 1 deletion arch/arm/core/cortex_m/thread_abort.c
Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,7 @@ void z_impl_k_thread_abort(k_tid_t thread)
{
SYS_PORT_TRACING_OBJ_FUNC_ENTER(k_thread, abort, thread);

if (_current == thread) {
if (arch_current_thread() == thread) {
if (arch_is_in_isr()) {
/* ARM is unlike most arches in that this is true
* even for non-peripheral interrupts, even though
Expand Down
6 changes: 3 additions & 3 deletions arch/arm64/core/cortex_r/arm_mpu.c
Original file line number Diff line number Diff line change
Expand Up @@ -727,7 +727,7 @@ static int configure_dynamic_mpu_regions(struct k_thread *thread)
*/
thread->arch.region_num = (uint8_t)region_num;

if (thread == _current) {
if (thread == arch_current_thread()) {
ret = flush_dynamic_regions_to_mpu(dyn_regions, region_num);
}

Expand Down Expand Up @@ -795,7 +795,7 @@ int arch_mem_domain_thread_add(struct k_thread *thread)

ret = configure_dynamic_mpu_regions(thread);
#ifdef CONFIG_SMP
if (ret == 0 && thread != _current) {
if (ret == 0 && thread != arch_current_thread()) {
/* the thread could be running on another CPU right now */
z_arm64_mem_cfg_ipi();
}
Expand All @@ -810,7 +810,7 @@ int arch_mem_domain_thread_remove(struct k_thread *thread)

ret = configure_dynamic_mpu_regions(thread);
#ifdef CONFIG_SMP
if (ret == 0 && thread != _current) {
if (ret == 0 && thread != arch_current_thread()) {
/* the thread could be running on another CPU right now */
z_arm64_mem_cfg_ipi();
}
Expand Down
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