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@FRASTM FRASTM commented Nov 15, 2024

change the configuration of the MCO 1 or 2 output for the stm32 series
Kconfig is no more used, set the configuration by the DTS as speciied by the dts/bindings/clock/st,stm32-clock-mco.yaml

See the refman of the stm32 to put the correct clock source and the prescaler value

&mco2 {
	clocks = <&rcc STM32_SRC_PLLI2S_R MCO2_SEL(1)>;
	prescaler = <MCO2_PRE(5)>; /* div by 5 --> set 0b111 in the MCO2PRE of the RCC CFGR */
	pinctrl-0 = <&rcc_mco_2_pc9>;
	pinctrl-names = "default";
	status = "okay";
};

Fixes #80885

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In commit message of "drivers: clock_control: stm32 mco driver get define from DTS", please mention that DTS configuration has been introduced and Kconfig method deprecated two releases before and can be then safely removed.
Please also update migration guide on this.

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I'd drop the clang commit entirely as most of the changes are bad from readbility/maintainability point of view.

@erwango erwango changed the title stm32 MCO configuration by the DTS stm32: mco: Remove deprecated Kconfig configuration Nov 21, 2024
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Otherwise LGTM

erwango
erwango previously approved these changes Nov 27, 2024
gautierg-st
gautierg-st previously approved these changes Nov 27, 2024
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erwango commented Nov 28, 2024

@FRASTM Please rebase to fix CI issue

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FRASTM commented Nov 29, 2024

rebased on 065bd32

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FRASTM commented Dec 5, 2024

rebase on c0be51d

The stm32F4 serie has HSI and HSE clock possible clock sources
The stm32F1 also has an external HSE possible clock source

Signed-off-by: Francois Ramu <[email protected]>
The stm32f411 and stm32f412 and stm32f446 have a PLLI2S
with a div M in front of the PLLI2S input.

Signed-off-by: Francois Ramu <[email protected]>
The stm32F41x have a PLLI2S M divider for their PLL I2S
but others like the stm32F401 or stm32F74x have the PLL M
divider from the main PLL : might affect the sysclock.
LL Function is the same for configuring the PLL I2S but
parameter could depends on the stm32 serie.

Signed-off-by: Francois Ramu <[email protected]>
Rely on the DTS to get the MCO input source clock and prescaler.
DTS configuration has been introduced and Kconfig method
deprecated two releases before and can be then safely removed.

Signed-off-by: Francois Ramu <[email protected]>
Depending on the stm32 serie the MCO1/2 prescaler is a value
set in the CFGR register to divide the MCO output clock.
Use the same model based on the RefMan for other stm32 series
than stm32C0/F4/F7/H5/H7, once the MCO is in the DTS.

Signed-off-by: Francois Ramu <[email protected]>
This sample enables and configures the MCO1/2 output
for stm32 target boards.
MCO_PRE_DIV_n is defined by the stm32XX_clock.h

Signed-off-by: Francois Ramu <[email protected]>
STM32 configuration for the MCO clock source and prescaler is done
by the DTS and no more by Kconfig (removed).

Signed-off-by: Francois Ramu <[email protected]>
@FRASTM FRASTM force-pushed the mco branch 3 times, most recently from 8ed5a95 to ee52327 Compare December 5, 2024 15:03
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erwango commented Dec 5, 2024

@nordic-krch PTAL

@fabiobaltieri fabiobaltieri assigned erwango and unassigned nordic-krch Dec 5, 2024
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All changes are in ST specific file, reassigning.

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Area matches: {<Area STM32 Platforms>: 20, <Area Drivers: Clock control>: 8, <Area Release Notes>: 1, <Area Samples>: 0}
labels: {'area: Clock control', 'platform: STM32', 'area: Samples', 'Release Notes'}
collab: ['erwango', 'FRASTM', 'gautierg-st', 'GeorgeCGV', 'marwaiehm-st', 'mathieuchopstm', 'nordic-krch', 'fabiobaltieri', 'kartben', 'nashif']
Submitted by: FRASTM
candidate maintainers: {'erwango': 20, 'nordic-krch': 8, 'fabiobaltieri': 1, 'kartben': 1}
Picked assignees: ['nordic-krch'] (27.59% ownership)

shrugs

@nashif nashif merged commit 498138e into zephyrproject-rtos:main Dec 6, 2024
33 of 41 checks passed
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PLL-I2S clock misconfiguration on STM32F446

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