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drivers: pinctrl: rename NXP Kinetis pinctrl to NXP PORT, and consolidate headers #81617

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Merged
mmahadevan108 merged 3 commits into from
Nov 22, 2024
Merged

drivers: pinctrl: rename NXP Kinetis pinctrl to NXP PORT, and consolidate headers #81617

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df14983
drivers: pinctrl: rename nxp,kinetis-pinctrl to nxp,port-pinctrl
danieldegrasse Nov 19, 2024
069790b
soc: nxp: consolidate nxp port pinctrl headers
danieldegrasse Nov 19, 2024
9ab134d
doc: migration-guide-4.1: add note about PORT pinctrl compatible change
danieldegrasse Nov 19, 2024
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2 changes: 1 addition & 1 deletion MAINTAINERS.yml
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Expand Up @@ -3680,7 +3680,7 @@ NXP Drivers:
- drivers/*/*.mcux
- drivers/*/*.nxp
- drivers/*/*nxp*
- drivers/*/*kinetis*
- drivers/*/*/*kinetis*
- drivers/misc/*/nxp*
- include/zephyr/dt-bindings/*/*nxp*
- include/zephyr/dt-bindings/*/*mcux*
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2 changes: 1 addition & 1 deletion boards/nxp/ucans32k1sic/doc/index.rst
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Expand Up @@ -60,7 +60,7 @@ This board has 5 GPIO ports named from ``gpioa`` to ``gpioe``.
Pin control can be further configured from your application overlay by adding
children nodes with the desired pinmux configuration to the singleton node
``pinctrl``. Supported properties are described in
:zephyr_file:`dts/bindings/pinctrl/nxp,kinetis-pinctrl.yaml`.
:zephyr_file:`dts/bindings/pinctrl/nxp,port-pinctrl.yaml`.

LEDs
----
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6 changes: 6 additions & 0 deletions doc/releases/migration-guide-4.1.rst
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Expand Up @@ -70,6 +70,12 @@ Interrupt Controller
LED Strip
=========

Pin Control
===========

* Renamed the ``compatible`` from ``nxp,kinetis-pinctrl`` to :dtcompatible:`nxp,port-pinctrl`.
* Renamed the ``compatible`` from ``nxp,kinetis-pinmux`` to :dtcompatible:`nxp,port-pinmux`.
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@butok butok Nov 20, 2024

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We can have it shorter, without "port":

- nxp,pinctrl
- nxp,pinmux
- CONFIG_PINCTRL_NXP

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@decsny decsny Nov 20, 2024

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no, the name of the hardware is "port" , and nxp has many different pinmux controllers. Also, the name "pinmux" and "pinctrl" is technically not supposed to be in the binding because it refers to a software subsystem, but it is what it is right now

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@danieldegrasse danieldegrasse Nov 20, 2024

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Agree here, the shortened version would be nxp,port. Ideally we would use that, but we have this awkward situation where there is a compatible for the pin control node itself as well as for each PORT IP instance, so we have the software pinmux and pinctrl prefixes.


Sensors
=======

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4 changes: 2 additions & 2 deletions drivers/clock_control/clock_control_mcux_syscon.c
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Expand Up @@ -44,7 +44,7 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
}
#endif

#if defined(CONFIG_PINCTRL_NXP_KINETIS)
#if defined(CONFIG_PINCTRL_NXP_PORT)
switch ((uint32_t)sub_system) {
#if defined(CONFIG_SOC_SERIES_MCXA)
case MCUX_PORT0_CLK:
Expand Down Expand Up @@ -82,7 +82,7 @@ static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
default:
break;
}
#endif /* defined(CONFIG_PINCTRL_NXP_KINETIS) */
#endif /* defined(CONFIG_PINCTRL_NXP_PORT) */

#ifdef CONFIG_ETH_NXP_ENET_QOS
if ((uint32_t)sub_system == MCUX_ENET_QOS_CLK) {
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2 changes: 1 addition & 1 deletion drivers/pinctrl/CMakeLists.txt
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Expand Up @@ -15,7 +15,7 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_RPI_PICO pinctrl_rpi_pico.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM pinctrl_sam.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_SAM0 pinctrl_sam0.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_STM32 pinctrl_stm32.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_KINETIS pinctrl_kinetis.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_PORT pinctrl_nxp_port.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCHP_XEC pinctrl_mchp_xec.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_IMX pinctrl_imx.c)
zephyr_library_sources_ifdef(CONFIG_PINCTRL_SIFIVE pinctrl_sifive.c)
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2 changes: 1 addition & 1 deletion drivers/pinctrl/Kconfig
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Expand Up @@ -44,7 +44,7 @@ source "drivers/pinctrl/Kconfig.rpi_pico"
source "drivers/pinctrl/Kconfig.sam"
source "drivers/pinctrl/Kconfig.sam0"
source "drivers/pinctrl/Kconfig.stm32"
source "drivers/pinctrl/Kconfig.kinetis"
source "drivers/pinctrl/Kconfig.nxp_port"
source "drivers/pinctrl/Kconfig.xec"
source "drivers/pinctrl/Kconfig.imx"
source "drivers/pinctrl/Kconfig.sifive"
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9 changes: 0 additions & 9 deletions drivers/pinctrl/Kconfig.kinetis
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This file was deleted.

9 changes: 9 additions & 0 deletions drivers/pinctrl/Kconfig.nxp_port
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@@ -0,0 +1,9 @@
# Copyright 2022, 2024 NXP
# SPDX-License-Identifier: Apache-2.0

config PINCTRL_NXP_PORT
bool "Pin controller driver for NXP PORT peripheral"
default y
depends on DT_HAS_NXP_PORT_PINMUX_ENABLED
help
Enable pin controller driver for NXP PORT peripheral
12 changes: 4 additions & 8 deletions drivers/pinctrl/pinctrl_kinetis.c → drivers/pinctrl/pinctrl_nxp_port.c
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Expand Up @@ -4,15 +4,15 @@
* SPDX-License-Identifier: Apache-2.0
*/


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drivers/pinctrl/pinctrl_nxp_port.c:7 
-
#define DT_DRV_COMPAT nxp_kinetis_pinmux
#define DT_DRV_COMPAT nxp_port_pinmux

#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/logging/log.h>
#include <fsl_clock.h>

LOG_MODULE_REGISTER(pinctrl_kinetis, CONFIG_PINCTRL_LOG_LEVEL);
LOG_MODULE_REGISTER(pinctrl_nxp_port, CONFIG_PINCTRL_LOG_LEVEL);

/* Port register addresses. */
static PORT_Type *ports[] = {
Expand All @@ -32,7 +32,7 @@

#define PIN(mux) (((mux) & 0xFC00000) >> 22)
#define PORT(mux) (((mux) & 0xF0000000) >> 28)
#define PINCFG(mux) ((mux) & Z_PINCTRL_KINETIS_PCR_MASK)
#define PINCFG(mux) ((mux) & Z_PINCTRL_NXP_PORT_PCR_MASK)

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drivers/pinctrl/pinctrl_nxp_port.c:35 
-#define PIN(mux) (((mux) & 0xFC00000) >> 22)
-#define PORT(mux) (((mux) & 0xF0000000) >> 28)
+#define PIN(mux)    (((mux) & 0xFC00000) >> 22)
+#define PORT(mux)   (((mux) & 0xF0000000) >> 28)

struct pinctrl_mcux_config {
const struct device *clock_dev;
Expand All @@ -41,21 +41,17 @@

int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
uintptr_t reg)
{

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drivers/pinctrl/pinctrl_nxp_port.c:44 
-int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
-			   uintptr_t reg)
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
for (uint8_t i = 0; i < pin_cnt; i++) {
PORT_Type *base = ports[PORT(pins[i])];
uint8_t pin = PIN(pins[i]);
uint16_t mux = PINCFG(pins[i]);

base->PCR[pin] = (base->PCR[pin] & (~Z_PINCTRL_KINETIS_PCR_MASK)) | mux;
base->PCR[pin] = (base->PCR[pin] & (~Z_PINCTRL_NXP_PORT_PCR_MASK)) | mux;
}
return 0;
}

/* Kinetis pinmux driver binds to the same DTS nodes,
* and handles clock init. Only bind to these nodes if pinmux driver
* is disabled.
*/
static int pinctrl_mcux_init(const struct device *dev)
{
const struct pinctrl_mcux_config *config = dev->config;
Expand Down Expand Up @@ -102,5 +98,5 @@
PRE_KERNEL_1, \
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, \
NULL);

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drivers/pinctrl/pinctrl_nxp_port.c:101 
-#define PINCTRL_MCUX_DT_INST_CLOCK_SUBSYS(n) \
-	DT_INST_CLOCKS_CELL(n, name)
+#define PINCTRL_MCUX_DT_INST_CLOCK_SUBSYS(n) DT_INST_CLOCKS_CELL(n, name)
 #endif
 
-#define PINCTRL_MCUX_INIT(n)						\
-	static const struct pinctrl_mcux_config pinctrl_mcux_##n##_config = {\
-		.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)),	\
-		.clock_subsys = (clock_control_subsys_t)		\
-				PINCTRL_MCUX_DT_INST_CLOCK_SUBSYS(n),	\
-	};								\
-									\
-	DEVICE_DT_INST_DEFINE(n,					\
-			    &pinctrl_mcux_init,				\
-			    NULL,					\
-			    NULL, &pinctrl_mcux_##n##_config,		\
-			    PRE_KERNEL_1,				\
-			    CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,	\
-			    NULL);
+#define PINCTRL_MCUX_INIT(n)                                                                       \
+	static const struct pinctrl_mcux_config pinctrl_mcux_##n##_config = {                      \
+		.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)),                                \
+		.clock_subsys = (clock_control_subsys_t)PINCTRL_MCUX_DT_INST_CLOCK_SUBSYS(n),      \
+	};                                                                                         \
+                                                                                                   \
+	DEVICE_DT_INST_DEFINE(n, &pinctrl_mcux_init, NULL, NULL, &pinctrl_mcux_##n##_config,       \
+			      PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, NULL);
DT_INST_FOREACH_STATUS_OKAY(PINCTRL_MCUX_INIT)
12 changes: 6 additions & 6 deletions dts/arm/nxp/nxp_k2x.dtsi
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Expand Up @@ -55,7 +55,7 @@

/* Dummy pinctrl node, filled with pin mux options at board level */
pinctrl: pinctrl {
compatible = "nxp,kinetis-pinctrl";
compatible = "nxp,port-pinctrl";
status = "okay";
};

Expand Down Expand Up @@ -194,31 +194,31 @@
};

porta: pinmux@40049000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x40049000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
};

portb: pinmux@4004a000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004a000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
};

portc: pinmux@4004b000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004b000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
};

portd: pinmux@4004c000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004c000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
};

porte: pinmux@4004d000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004d000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
};
Expand Down
12 changes: 6 additions & 6 deletions dts/arm/nxp/nxp_k6x.dtsi
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Expand Up @@ -74,7 +74,7 @@

/* Dummy pinctrl node, filled with pin mux options at board level */
pinctrl: pinctrl {
compatible = "nxp,kinetis-pinctrl";
compatible = "nxp,port-pinctrl";
status = "okay";
};

Expand Down Expand Up @@ -255,31 +255,31 @@
};

porta: pinmux@40049000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x40049000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
};

portb: pinmux@4004a000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004a000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
};

portc: pinmux@4004b000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004b000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
};

portd: pinmux@4004c000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004c000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
};

porte: pinmux@4004d000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004d000 0xd0>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
};
Expand Down
12 changes: 6 additions & 6 deletions dts/arm/nxp/nxp_k8x.dtsi
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Expand Up @@ -34,7 +34,7 @@

/* Dummy pinctrl node, filled with pin mux options at board level */
pinctrl: pinctrl {
compatible = "nxp,kinetis-pinctrl";
compatible = "nxp,port-pinctrl";
status = "okay";
};

Expand Down Expand Up @@ -260,31 +260,31 @@
};

porta: pinmux@40049000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x40049000 0x1000>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
};

portb: pinmux@4004a000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004a000 0x1000>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
};

portc: pinmux@4004b000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004b000 0x1000>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
};

portd: pinmux@4004c000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004c000 0x1000>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
};

porte: pinmux@4004d000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004d000 0x1000>;
clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
};
Expand Down
12 changes: 6 additions & 6 deletions dts/arm/nxp/nxp_ke1xf.dtsi
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Expand Up @@ -92,7 +92,7 @@

/* Dummy pinctrl node, filled with pin mux options at board level */
pinctrl: pinctrl {
compatible = "nxp,kinetis-pinctrl";
compatible = "nxp,port-pinctrl";
status = "okay";
};

Expand Down Expand Up @@ -422,31 +422,31 @@
};

porta: pinmux@40049000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x40049000 0x1000>;
clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>;
};

portb: pinmux@4004a000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004a000 0x1000>;
clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>;
};

portc: pinmux@4004b000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004b000 0x1000>;
clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>;
};

portd: pinmux@4004c000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004c000 0x1000>;
clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>;
};

porte: pinmux@4004d000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004d000 0x1000>;
clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>;
};
Expand Down
12 changes: 6 additions & 6 deletions dts/arm/nxp/nxp_ke1xz.dtsi
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Expand Up @@ -67,7 +67,7 @@
};

pinctrl: pinctrl {
compatible = "nxp,kinetis-pinctrl";
compatible = "nxp,port-pinctrl";
};

soc {
Expand Down Expand Up @@ -187,31 +187,31 @@
};

porta: pinmux@40049000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x40049000 0x1000>;
clocks = <&pcc 0x124 KINETIS_PCC_SRC_NONE_OR_EXT>;
};

portb: pinmux@4004a000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004a000 0x1000>;
clocks = <&pcc 0x128 KINETIS_PCC_SRC_NONE_OR_EXT>;
};

portc: pinmux@4004b000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004b000 0x1000>;
clocks = <&pcc 0x12c KINETIS_PCC_SRC_NONE_OR_EXT>;
};

portd: pinmux@4004c000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004c000 0x1000>;
clocks = <&pcc 0x130 KINETIS_PCC_SRC_NONE_OR_EXT>;
};

porte: pinmux@4004d000 {
compatible = "nxp,kinetis-pinmux";
compatible = "nxp,port-pinmux";
reg = <0x4004d000 0x1000>;
clocks = <&pcc 0x134 KINETIS_PCC_SRC_NONE_OR_EXT>;
};
Expand Down
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