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drivers: crypto: Add initial support for rpi_pico sha256 accelerator #85036
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Original file line number | Diff line number | Diff line change |
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@@ -11,6 +11,7 @@ supported: | |
- adc | ||
- clock | ||
- counter | ||
- crypto | ||
- dma | ||
- gpio | ||
- hwinfo | ||
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Original file line number | Diff line number | Diff line change |
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@@ -1,20 +1,25 @@ | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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zephyr_library() | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_ATAES132A crypto_ataes132a.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_MBEDTLS_SHIM crypto_mtls_shim.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_STM32 crypto_stm32.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_STM32_HASH crypto_stm32_hash.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_SMARTBOND crypto_smartbond.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_NRF_ECB crypto_nrf_ecb.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_INTEL_SHA crypto_intel_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_NPCX_SHA crypto_npcx_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_MCHP_XEC_SYMCR crypto_mchp_xec_symcr.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT51XXX_SHA crypto_it51xxx_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT8XXX2_SHA crypto_it8xxx2_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT8XXX2_SHA_V2 crypto_it8xxx2_sha_v2.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_MCUX_DCP crypto_mcux_dcp.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_SI32 crypto_si32.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_CC23X0 crypto_cc23x0.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_RTS5912_SHA crypto_rts5912_sha.c) | ||
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# zephyr-keep-sorted-start | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_ATAES132A crypto_ataes132a.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_CC23X0 crypto_cc23x0.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_INTEL_SHA crypto_intel_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT51XXX_SHA crypto_it51xxx_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT8XXX2_SHA crypto_it8xxx2_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_IT8XXX2_SHA_V2 crypto_it8xxx2_sha_v2.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_MBEDTLS_SHIM crypto_mtls_shim.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_MCHP_XEC_SYMCR crypto_mchp_xec_symcr.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_MCUX_DCP crypto_mcux_dcp.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_NPCX_SHA crypto_npcx_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_NRF_ECB crypto_nrf_ecb.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_RPI_PICO_SHA256 crypto_rpi_pico_sha256.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_RTS5912_SHA crypto_rts5912_sha.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_SI32 crypto_si32.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_SMARTBOND crypto_smartbond.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_STM32 crypto_stm32.c) | ||
zephyr_library_sources_ifdef(CONFIG_CRYPTO_STM32_HASH crypto_stm32_hash.c) | ||
# zephyr-keep-sorted-stop | ||
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zephyr_library_link_libraries_ifdef(CONFIG_MBEDTLS mbedTLS) |
Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,10 @@ | ||
# Copyright (c) 2025 TOKITA Hiroshi | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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config CRYPTO_RPI_PICO_SHA256 | ||
bool "Raspberry Pi RP2 series SHA256 Accelerator" | ||
default y | ||
depends on DT_HAS_RASPBERRYPI_PICO_SHA256_ENABLED | ||
select PICOSDK_USE_SHA256 | ||
help | ||
Enable driver for RP2 series SHA256 accelerator |
Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,135 @@ | ||
/* | ||
* Copyright (c) 2025 TOKITA Hiroshi | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#define DT_DRV_COMPAT raspberrypi_pico_sha256 | ||
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#include <zephyr/crypto/crypto.h> | ||
#include <zephyr/kernel.h> | ||
#include <zephyr/sys/util_macro.h> | ||
#include <zephyr/sys/byteorder.h> | ||
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#include <pico/bootrom/lock.h> | ||
#include <pico/sha256.h> | ||
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#include <zephyr/logging/log.h> | ||
LOG_MODULE_REGISTER(crypto_rpi_pico_sha256, CONFIG_CRYPTO_LOG_LEVEL); | ||
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struct crypto_rpi_pico_sha256_data { | ||
pico_sha256_state_t state; | ||
struct k_spinlock lock; | ||
}; | ||
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static int crypto_rpi_pico_sha256_hash_handler(struct hash_ctx *ctx, struct hash_pkt *pkt, | ||
bool finish) | ||
{ | ||
struct crypto_rpi_pico_sha256_data *data = ctx->device->data; | ||
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if (!data->state.locked) { | ||
LOG_ERR("Invalid lock status: unlocked"); | ||
return -EINVAL; | ||
} | ||
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data->state.cache_used = 0; | ||
data->state.cache.word = 0; | ||
data->state.total_data_size = 0; | ||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Is it OK to clear the There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Nice catch. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more.
While doing another review yesterday I realized that perhaps not all drivers support multipart hash computation. So in the end what you did might be already OK for the time being (you can extend that later if you prefer); please only add a check like the one done in that PR and I think it should be fine. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Since there is an example of an implementation that is not supported, I will submit it using that implementation method for now. |
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sha256_err_not_ready_clear(); | ||
sha256_set_bswap(true); | ||
sha256_start(); | ||
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pico_sha256_update(&data->state, pkt->in_buf, pkt->in_len); | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Are there limits on the input size by the HAL? If so, please test for them to return EINVAL |
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if (!finish) { | ||
LOG_ERR("Multipart hashing not supported yet"); | ||
return -ENOTSUP; | ||
} | ||
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pico_sha256_write_padding(&data->state); | ||
sha256_wait_valid_blocking(); | ||
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for (uint i = 0; i < 8; i++) { | ||
((uint32_t *)pkt->out_buf)[i] = BSWAP_32((uint32_t)sha256_hw->sum[i]); | ||
} | ||
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return 0; | ||
} | ||
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static int crypto_rpi_pico_sha256_query_hw_caps(const struct device *dev) | ||
{ | ||
return CAP_SEPARATE_IO_BUFS | CAP_SYNC_OPS; | ||
} | ||
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static int crypto_rpi_pico_sha256_hash_begin_session(const struct device *dev, struct hash_ctx *ctx, | ||
enum hash_algo algo) | ||
{ | ||
struct crypto_rpi_pico_sha256_data *data = dev->data; | ||
k_spinlock_key_t key; | ||
int ret; | ||
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if (data->state.locked) { | ||
LOG_ERR("Invalid lock status: locked"); | ||
return -EINVAL; | ||
} | ||
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if (algo != CRYPTO_HASH_ALGO_SHA256) { | ||
LOG_ERR("Unsupported algo: %d", algo); | ||
return -EINVAL; | ||
} | ||
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if (ctx->flags & ~(crypto_rpi_pico_sha256_query_hw_caps(dev))) { | ||
LOG_ERR("Unsupported flag %x", ctx->flags); | ||
return -EINVAL; | ||
} | ||
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key = k_spin_lock(&data->lock); | ||
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ret = bootrom_try_acquire_lock(BOOTROM_LOCK_SHA_256); | ||
if (!ret) { | ||
LOG_ERR("bootrom_try_acquire_lock failed"); | ||
k_spin_unlock(&data->lock, key); | ||
return -EBUSY; | ||
} | ||
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data->state.locked = true; | ||
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k_spin_unlock(&data->lock, key); | ||
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ctx->hash_hndlr = crypto_rpi_pico_sha256_hash_handler; | ||
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return 0; | ||
} | ||
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static int crypto_rpi_pico_sha256_hash_session_free(const struct device *dev, struct hash_ctx *ctx) | ||
{ | ||
struct crypto_rpi_pico_sha256_data *data = dev->data; | ||
k_spinlock_key_t key; | ||
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if (!data->state.locked) { | ||
LOG_ERR("Invalid lock status: unlocked"); | ||
return -EINVAL; | ||
} | ||
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key = k_spin_lock(&data->lock); | ||
bootrom_release_lock(BOOTROM_LOCK_SHA_256); | ||
data->state.locked = false; | ||
k_spin_unlock(&data->lock, key); | ||
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return 0; | ||
} | ||
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static DEVICE_API(crypto, crypto_rpi_pico_sha256_crypto_api) = { | ||
.query_hw_caps = crypto_rpi_pico_sha256_query_hw_caps, | ||
.hash_begin_session = crypto_rpi_pico_sha256_hash_begin_session, | ||
.hash_free_session = crypto_rpi_pico_sha256_hash_session_free, | ||
}; | ||
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#define CRYPTO_RPI_PICO_SHA256_INIT(idx) \ | ||
static struct crypto_rpi_pico_sha256_data crypto_rpi_pico_sha256_##idx##_data; \ | ||
DEVICE_DT_INST_DEFINE(idx, NULL, NULL, &crypto_rpi_pico_sha256_##idx##_data, NULL, \ | ||
POST_KERNEL, CONFIG_CRYPTO_INIT_PRIORITY, \ | ||
&crypto_rpi_pico_sha256_crypto_api); | ||
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DT_INST_FOREACH_STATUS_OKAY(CRYPTO_RPI_PICO_SHA256_INIT) |
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@@ -0,0 +1,8 @@ | ||
# Copyright (c) 2025 TOKITA Hiroshi | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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description: RaspberryPi Pico SHA256 accelerator | ||
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compatible: "raspberrypi,pico-sha256" | ||
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include: base.yaml |
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Does this also work on Hazard3 as it's merged now? Cannot test right now, sorry, but interested whether or not bootrom call works fine, as those are somewhat interesting on RISC-V mode due to emulation being involved and may require application/RTOS to allocate a stack for BootROM emulator in some cases |
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@@ -0,0 +1,9 @@ | ||
/* | ||
* Copyright (c) 2025 TOKITA Hiroshi | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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&sha256 { | ||
status = "okay"; | ||
}; |
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Sorting - good idea!
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nit: I'd prefer it if the sorting is one commit, and the addition is a separate commit. The end result is the same, but it's easier to to see the two orthogonal things going on.