Introduce TI EHRPWM/EPWM driver and syscon clock controller #88757
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area: PWM
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This is a syscon backed gate-clock driver which uses its parent syscon node to write to MMRs corresponding to the clk-id to enable or disable a clock. Signed-off-by: Amneesh Singh <[email protected]>
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This is the driver for EPWM/EHRPWM module of TI SoCs. It only uses Action Qualifier submodule currently. Signed-off-by: Amneesh Singh <[email protected]>
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Hello, it has been a while since I added this. I would like some opinions on the clock_control driver of this patchset. As you can see we are handling multiple compatible strings in the same driver. This requires creation of multiple bindings. Is there a better way to do this? |
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CC: @gramsay0 @Ayush1325 @glneo - Please feel free to review if and when you get some time. |
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| #if DT_HAS_COMPAT_STATUS_OKAY(DT_AM64_COMPAT) | ||
| static const struct ti_syscon_gate_clk_id_data am64_clk_ids[] = { | ||
| {0, 0}, {0, 1}, {0, 2}, {0, 3}, {0, 4}, {0, 5}, {0, 6}, {0, 7}, {0, 8}, |
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Any good way to encode this data into DT so that we don't need to keep device specific data here in the driver?
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Actually, I replicated this behavior from Linux where several compat strings can stay in the same driver code.
To answer your question, this can be added to the DT, provided noone has a problem with this big array of register indices in the node.
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This pull request has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this pull request will automatically be closed in 14 days. Note, that you can always re-open a closed pull request at any time. |
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not stale |
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I think we should wait on the clock controller to get merged so that we can avoid the clock hack using macros in the driver: #90216 |
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