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dts: xilinx: add cadence spi controllers to zynqmp.dtsi #90960

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Merged
merged 1 commit into from
Aug 19, 2025
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dts: xilinx: add cadence spi controllers to zynqmp.dtsi #90960

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27 changes: 26 additions & 1 deletion dts/arm/xilinx/zynqmp.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -304,6 +304,31 @@
IRQ_DEFAULT_PRIORITY>;
reg = <0xfd070000 0x30000>;
};
};

spi0: spi@ff040000 {
compatible = "cdns,spi";
reg = <0xff040000 0x1000>;
status = "disabled";
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
#address-cells = <1>;
#size-cells = <0>;
fifo-width = <8>;
rx-fifo-depth = <128>;
tx-fifo-depth = <128>;
};

spi1: spi@ff050000 {
compatible = "cdns,spi";
reg = <0xff050000 0x1000>;
status = "disabled";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL
IRQ_DEFAULT_PRIORITY>;
#address-cells = <1>;
#size-cells = <0>;
fifo-width = <8>;
rx-fifo-depth = <128>;
tx-fifo-depth = <128>;
};
};
};
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