dts: st: u3: enable sai node for stm32u3xx

dts/arm/st/u3/stm32u3.dtsi

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2025 STMicroelectronics
+ * Copyright (c) 2025 ZAL Zentrum für Angewandte Luftfahrtforschung GmbH
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -377,6 +378,28 @@
 			interrupts = <0 0>;
 			status = "disabled";
 		};
+
+		sai1_a: sai1@40015404 {
+			compatible = "st,stm32-sai";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40015404 0x20>;
+			clocks = <&rcc STM32_CLOCK(APB2, 21)>;
+			dmas = <&gpdma1 1 36 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
+				STM32_DMA_16BITS)>;
+			status = "disabled";
+		};
+
+		sai1_b: sai1@40015424 {
+			compatible = "st,stm32-sai";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40015424 0x20>;
+			clocks = <&rcc STM32_CLOCK(APB2, 21)>;
+			dmas = <&gpdma1 0 37 (STM32_DMA_MODE_NORMAL | STM32_DMA_PRIORITY_HIGH |
+				STM32_DMA_16BITS)>;
+			status = "disabled";
+		};
 	};
 };
 

samples/drivers/i2s/output/boards/nucleo_u385rg_q.conf

@@ -0,0 +1 @@
+CONFIG_HEAP_MEM_POOL_SIZE=4192

samples/drivers/i2s/output/boards/nucleo_u385rg_q.overlay

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2025 ZAL Zentrum für Angewandte Luftfahrtforschung GmbH
+ * Copyright (c) 2025 Mario Paja
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	aliases {
+		i2s-tx = &sai1_a;
+	};
+
+	chosen {
+		zephyr,console = &lpuart1;
+		zephyr,shell-uart = &lpuart1;
+	};
+};
+
+/* 46.875KHz (6.29% Error) */
+&sai1_a {
+	pinctrl-0 = <&sai1_mclk_a_pb8 &sai1_sd_a_pc1
+		&sai1_fs_a_pa9 &sai1_sck_a_pb10>;
+	pinctrl-names = "default";
+	status = "okay";
+	mclk-enable;
+	mclk-divider = "div-256";
+	dma-names = "tx";
+};
+
+&gpdma1 {
+	status = "okay";
+};
+
+&clk_msik{
+	status = "okay";
+};
+
+&i2c3 {
+	status = "disabled";
+};
+
+&usart1 {
+	status = "disabled";
+};