drivers: dma: BFLB DMA #95030

VynDragon · 2025-08-26T21:29:03Z

Adds BFLB DMA.

github-actions · 2025-08-30T03:36:15Z

The following west manifest projects have changed revision in this Pull Request:

Name	Old Revision	New Revision	Diff
hal_bouffalolab	zephyrproject-rtos/hal_bouffalolab@`9f2ab1b` (`main`)	zephyrproject-rtos/hal_bouffalolab#5	zephyrproject-rtos/hal_bouffalolab#5/files

⛔ DNM label due to: 1 project with PR revision

Note: This message is automatically posted and updated by the Manifest GitHub Action.

drivers/dma/dma_bflb.c

nandojve · 2025-09-06T07:45:17Z

drivers/dma/dma_bflb.c

+	uint32_t control = 0;
+	uint16_t size;
+
+	if (channel >= BFLB_DMA_CH_NB) {


if you want, you can make this code misra compatible.
Add a while(0) { block at beggining
} close before the inval.

then, you must use break; to jump out without a goto;

I assume you mean while(1) or while (true)? That is very cursed. Done.

No, it is really while (0). I questioned this too first time.

that doesnt work... It just doesnt run the code in the while loop with while(0)

I googled it, i think it's supposed to be a do while loop, not a while loop

Yes, sorry.

zephyr/drivers/clock_control/clock_control_mchp_sam_d5x_e5x.c

Line 191 in 1f3fb17

do {

if you want, you can make this code misra compatible. Add a while(0) { block at beggining } close before the inval.

then, you must use break; to jump out without a goto;

Is this really a misra guidline? This makes things far more unreadable than a simple goto or early return. Most of zephyr uses goto out OR early return.

Would prefer to stick with Zephyr code styling over misra here unless you can point at the rules for this.

This wasn’t resolved

nandojve · 2025-09-06T07:45:59Z

drivers/dma/dma_bflb.c

+{
+	const struct dma_bflb_config *cfg = dev->config;
+	uint32_t config, control;
+


useless space, fix all

still have useless space

nandojve · 2025-09-06T07:48:00Z

drivers/dma/dma_bflb.c

+	}
+	stat->pending_length = (control & DMA_TRANSFERSIZE_MASK) >> DMA_TRANSFERSIZE_SHIFT;
+
+	stat->pending_length *= dma_bflb_get_transfer_size(dev, channel);


you should add 1 space after the if block
then drop the space between the stat->pending_length
having the stat->pending_length glued with the if statement is OK and shows that you are preparing the data to be evaluated.

drivers/dma/dma_bflb.c

VynDragon · 2025-10-10T18:24:08Z

I think I have addressed all review comments, the do while loop has been reverted and simplified due to the lack of need for irq locking.

VynDragon · 2025-10-10T19:04:50Z

I dont understand the build failures, why did enabling DMA enable flash tests? Also beagle board failing...

josuah · 2025-10-10T21:47:03Z

It is also failing on main.

1a5bef6 from #96749 enables flash tests for all boards with storage_partitions, assuming they all have a flash controller.

-  drivers.flash.common.disable_spi_nor:
-    filter: dt_compat_enabled("soc-nv-flash") and dt_compat_enabled("jedec,spi-nor")
+  drivers.flash.common.test_storage_partition:
+    filter: dt_label_with_parent_compat_enabled("storage_partition", "fixed-partitions")

For bouffalolab, the devicetree flashctrl node is there, but not the associated driver yet, as it comes in this PR

drivers: flash: Introduce BFLB flash driver. #96680

So merging it first will fix this current PR, or a hotfix PR to exclude the buggy board will also work.

VynDragon · 2025-10-10T22:02:41Z

enables flash tests for all boards with storage_partitions, assuming they all have a flash controller.

??? That's not very smart and means it shouldnt have passed the CI?

VynDragon · 2025-10-10T22:06:01Z

And pretty obviously it should be checking for the presence of the 'flash' tag in supported

josuah · 2025-10-10T22:38:52Z

Yes CI should have been catching that.

I think twister does some heuristics to try to detect what might be affected by a PR to not re-test everything every time. Maybe that's why.

VynDragon · 2025-10-11T00:24:16Z

I also looked at the test file and it really makes no sense, best I can tell the flash tag is necessary to run any of those tests anyway, i'm not sure how this is getting them triggered for the bflb boards. Possibly using the filter: entry disables the main tag filter?

will be deleted Signed-off-by: Camille BAUD <[email protected]>

Adds the DMA node Signed-off-by: Camille BAUD <[email protected]>

Introduce BFLB's DMA. Signed-off-by: Camille BAUD <[email protected]>

Guarantees De-gating the peripherals. Signed-off-by: Camille BAUD <[email protected]>

Adds the dma to supported for testing Signed-off-by: Camille BAUD <[email protected]>

sonarqubecloud · 2025-10-12T16:24:12Z

Quality Gate passed

Issues
2 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

VynDragon force-pushed the bflb_dma branch from 6c94f10 to 7ddc6a7 Compare August 26, 2025 21:30

VynDragon requested a review from nandojve August 27, 2025 11:56

VynDragon force-pushed the bflb_dma branch 2 times, most recently from 238c537 to 75399de Compare August 30, 2025 03:34

github-actions bot added manifest manifest-hal_bouffalolab DNM (manifest) This PR should not be merged (controlled by action-manifest) labels Aug 30, 2025

VynDragon marked this pull request as ready for review August 30, 2025 04:03

zephyrbot added platform: Bouffalo Lab area: DMA Direct Memory Access area: RISCV RISCV Architecture (32-bit & 64-bit) area: Clock Control labels Aug 30, 2025

zephyrbot requested review from carlocaione, edersondisouza, fkokosinski, katsuster, kgugala, masz-nordic, mgielda, nordic-krch, npitre, teburd, tgorochowik and ycsin August 30, 2025 04:04

zephyrbot assigned nordic-krch Aug 30, 2025

VynDragon force-pushed the bflb_dma branch 2 times, most recently from 776df91 to 2b5793b Compare September 1, 2025 17:52

nandojve requested changes Sep 6, 2025

View reviewed changes

VynDragon force-pushed the bflb_dma branch from 2b5793b to 0df1543 Compare September 6, 2025 14:18

zephyrbot requested a review from josuah October 10, 2025 17:34

VynDragon force-pushed the bflb_dma branch from 7fb350b to 4a684bd Compare October 10, 2025 18:23

VynDragon requested a review from teburd October 10, 2025 18:24

VynDragon force-pushed the bflb_dma branch from 4a684bd to 805331f Compare October 10, 2025 18:27

VynDragon mentioned this pull request Oct 10, 2025

[RFC] Bouffalolab Vendor Support #83663

Open

VynDragon force-pushed the bflb_dma branch from 805331f to f6bee8c Compare October 11, 2025 12:46

VynDragon modified the milestones: 4.3, v4.3.0 Oct 11, 2025

zephyrbot added area: Tests Issues related to a particular existing or missing test area: Flash labels Oct 11, 2025

VynDragon force-pushed the bflb_dma branch from 0ac2ed3 to f6bee8c Compare October 12, 2025 15:58

VynDragon added 5 commits October 12, 2025 17:59

west.yml: hal pr build commit

cc0adb7

will be deleted Signed-off-by: Camille BAUD <[email protected]>

dts: bflb: Add DMA node for BFLB SoCs

9dc3d05

Adds the DMA node Signed-off-by: Camille BAUD <[email protected]>

drivers: dma: Introduce BFLB DMA driver

213157f

Introduce BFLB's DMA. Signed-off-by: Camille BAUD <[email protected]>

drivers: clock_control: Update clock control to support new peripherals

374a256

Guarantees De-gating the peripherals. Signed-off-by: Camille BAUD <[email protected]>

boards: Add DMA to supported for bflb boards

101c1d1

Adds the dma to supported for testing Signed-off-by: Camille BAUD <[email protected]>

VynDragon force-pushed the bflb_dma branch from f6bee8c to 101c1d1 Compare October 12, 2025 15:59

VynDragon removed area: Flash area: Tests Issues related to a particular existing or missing test labels Oct 12, 2025

drivers: dma: BFLB DMA #95030

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