arch: arm: cortex_r: define MPU RASR size for ROM #95328
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Userspace threads need unpriviliged read access to .text and .rodata, both of which reside in the ROM region. However, in non-XIP builds, data resides on the RAM, for which, unpriviliged access is turned off by default (check REGION_RAM_ATTR). For this, MPU must be configured and Cortex-R allows only sizes that are powers of 2. To solve this problem, the symbol _image_rom_end_order was added, which take the end address of ROM section, gets the next highest power of 2, subtracts one (RASR size value is decremented), and does a single left shift (RASR size field position). This is then directly used in the compile time symbol mpu_config by several SoCs. This works for these SOCs since their ROM start address is 0x0, making the end address and the size the same value. So we, - Fix this by using the ROM size and not the end address for this value - Also define __rom_region_size as it is one of the extern symbols in linker-defs.h - Rename _image_rom_end_order to _image_rom_mpu_rasr_size which is more appropriate in all places including all SoC MPU configurations. Signed-off-by: Amneesh Singh <[email protected]>
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Apologies everyone, as it happens, the same change got merged yesterday and I did not check. Closing as a duplicate of : #79221 |
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Userspace threads need unpriviliged read access to .text and .rodata, both of which reside in the ROM region. However, in non-XIP builds, data resides on the RAM, for which, unpriviliged access is turned off by default (check REGION_RAM_ATTR). For this, MPU must be configured and Cortex-R allows only sizes that are powers of 2.
To solve this problem, the symbol _image_rom_end_order was added, which take the end address of ROM section, gets the next highest power of 2, subtracts one (RASR size value is decremented), and does a single left shift (RASR size field position). This is then directly used in the compile time symbol mpu_config by several SoCs.
This works for these SOCs since their ROM start address is 0x0, making the end address and the size the same value. So we,