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billwatersiii
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Add psc3m5 counter driver:

  • Add a new counter driver implementation based on the PDL for
    Infineon CAT1B devices. This enables support for hardware
    counters on the PSC3M5 platform.
  • Add IFX_TCPWM_Counter_DeInit and IFX_TCPWM_Counter_Init
    macros to include/zephyr/drivers/timer/ifx_tcpwm.h
    and sort all of the macros in that file
  • Enable the alarm sample for the kit_psc3m5_evk

@teburd teburd changed the title Psc3m5 counter infineon: Psc3m5 counter Sep 17, 2025
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This should really be added to the counter API test.

Would be great to see some test coverage on the neat tricks being used for counter_is_bit_mask, counter_ticks_add, counter_ticks_sub functions which look well done but took a moment to read and understand. Some tests would make it easier to ensure the edge scenarios are covered and stay covered over time.

I'm unsure the likely() to shortcut masking bits when the top value is a 2^n-1 is worth while, but you likely know better than me, and its a neat how its done.

I'm not super familiar with tcpwm IP but if it can do counter capture (capture the count on a gpio trigger) there's a PR from @XenuIsWatching in #89127 that might be worth watching and implementing.

@billwatersiii
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This should really be added to the counter API test.

Would be great to see some test coverage on the neat tricks being used for counter_is_bit_mask, counter_ticks_add, counter_ticks_sub functions which look well done but took a moment to read and understand. Some tests would make it easier to ensure the edge scenarios are covered and stay covered over time.

I'm unsure the likely() to shortcut masking bits when the top value is a 2^n-1 is worth while, but you likely know better than me, and its a neat how its done.

I'm not super familiar with tcpwm IP but if it can do counter capture (capture the count on a gpio trigger) there's a PR from @XenuIsWatching in #89127 that might be worth watching and implementing.

I added the counter API test. We will address you other suggestions with future pull requests.

@JarmouniA
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@billwatersiii Please leave comments resolving to reviewers.

teburd
teburd previously approved these changes Sep 19, 2025
@nashif
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nashif commented Sep 19, 2025

platform related change, assign to platform maintainer.

@billwatersiii billwatersiii force-pushed the psc3m5-counter branch 2 times, most recently from 8e5d597 to a020aa3 Compare September 19, 2025 20:35
lozyn888 and others added 3 commits September 19, 2025 15:40
- Add a new counter driver implementation based on the PDL for
  Infineon CAT1B devices. This enables support for hardware
  counters on the PSC3M5 platform.
- Add IFX_TCPWM_Counter_DeInit and IFX_TCPWM_Counter_Init
  macros to include/zephyr/drivers/timer/ifx_tcpwm.h
  and sort all of the macros in that file

Signed-off-by: Yurii Lozynskyi <[email protected]>
Enable the alarm sample for the kit_psc3m5_evk

Signed-off-by: Bill Waters <[email protected]>
Enable the counter test for the kit_psc3m5_evk

Signed-off-by: Bill Waters <[email protected]>
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@cfriedt cfriedt merged commit b69b750 into zephyrproject-rtos:main Sep 22, 2025
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9 participants