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Enable LTDC/DSI on stm32f469i-disco using PLLSAI #95954

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Enable LTDC/DSI on stm32f469i-disco using PLLSAI #95954

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10308e5
dts: arm: st: add mipi_dsi node in stm32f469.dtsi
phildefer Sep 13, 2025
8a2aba4
boards: st: add pllsai for ltdc & mipi-dsi support on stm32f469 disco
phildefer Sep 13, 2025
069b780
samples: drivers: display: add stm32f469_disco conf file
phildefer Sep 13, 2025
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34 changes: 34 additions & 0 deletions boards/st/stm32f469i_disco/Kconfig.defconfig
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Original file line number Diff line number Diff line change
Expand Up @@ -9,5 +9,39 @@ config SPI_STM32_INTERRUPT
default y
depends on SPI

if LVGL

# Double frame buffer maintained by lvgl.
config STM32_LTDC_FB_NUM
default 0

config LV_Z_DOUBLE_VDB
default y

config LV_Z_VDB_ZEPHYR_REGION
default y

config LV_Z_VDB_ZEPHYR_REGION_NAME
default "SDRAM1"

config LV_Z_FULL_REFRESH
default y

config INPUT
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not specific to LVGL.

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I agree, it is not specific to LVGL, however in a sense it often comes with LVGL and I feel that having this LVGL part within the Kconfig.defconfig allows to avoid having to add a board specifc conf in each LVGL sample apps.

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@JarmouniA JarmouniA Oct 6, 2025 •
edited
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Yes, just needs to be outside if LVGL... endif, and inside if DISPLAY... endif.

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This part is common with settings present in M1166 display shield

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Having checked a bit more, I am having 2nd thought about this config INPUT in fact.

  1. LVGL can work without having an input available (at least it sounds like it)
  2. While there is a touchscreen on this display, an application running might not actually want to have the touchscreen initialized / running
  3. LVGL samples (at least the ones in samples/modules/lvgl) ALSO set CONFIG_INPUT=y themself.
  4. It should also be possible to have INPUT enabled even if there is no LVGL used

So, for all those reasons, I actually think that we just shouldn't have config INPUT at all in this Kconfig.defconfig, this is a matter of the project to say if it wants to have the INPUT available or not based on its needs.

Does this make sense ?

While this is also done in several other Kconfig.defconfig around for other STM32 boards/shield, I think this should not be put in here and should actually be removed from the existing places.

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Agreed

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@phildefer, if you agree with my analysis, I let you remove this config INPUT from the Kconfig.default and I will shortly push a PR to avoid enforcing INPUT=y in the STM32 board / shield.

default y

config LV_Z_BITS_PER_PIXEL
default 32

config LV_DPI_DEF
default 128

config LV_Z_FLUSH_THREAD
default y

choice LV_COLOR_DEPTH
default LV_COLOR_DEPTH_32
endchoice

endif #LVGL
endif # BOARD_STM32F469I_DISCO
5 changes: 5 additions & 0 deletions boards/st/stm32f469i_disco/stm32f469i_disco.conf
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@@ -0,0 +1,5 @@
# Copyright (c) 2025 Philippe Peurichard <[email protected]>
# SPDX-License-Identifier: Apache-2.0

# Initialize after LTDC and MIPI-DSI
CONFIG_DISPLAY_OTM8009A_INIT_PRIORITY=87
81 changes: 80 additions & 1 deletion boards/st/stm32f469i_disco/stm32f469i_disco.dts
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Expand Up @@ -20,6 +20,8 @@
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,ccm = &ccm0;
zephyr,display = &ltdc;
zephyr,touch = &ft5336;
};

sdram1: sdram@c0000000 {
Expand Down Expand Up @@ -53,6 +55,12 @@
};
};

lvgl_pointer {
compatible = "zephyr,lvgl-pointer-input";
input = <&ft5336>;
invert-y;
};

gpio_keys {
compatible = "gpio-keys";

Expand Down Expand Up @@ -86,6 +94,17 @@
mul-n = <336>;
div-p = <2>;
div-q = <7>;
div-r = <6>;
clocks = <&clk_hse>;
status = "okay";
};

&pllsai {
div-m = <8>;
mul-n = <266>;
div-p = <2>;
div-r = <5>;
div-divr = <2>;
clocks = <&clk_hse>;
status = "okay";
};
Expand Down Expand Up @@ -116,6 +135,13 @@
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
status = "okay";

ft5336: ft5336@2a {
compatible = "focaltech,ft5336";
reg = <0x2a>;
int-gpios = <&gpioj 5 0>;
status = "okay";
};
};

&spi2 {
Expand Down Expand Up @@ -174,7 +200,6 @@ zephyr_udc0: &usbotg_fs {

sdram {
compatible = "st,stm32-fmc-sdram";
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <8>;
mode-register = <0x230>;
Expand All @@ -184,6 +209,7 @@ zephyr_udc0: &usbotg_fs {
* Note: SDRAM_CLK_MHZ = HCLK_MHZ / 2
*/
refresh-rate = <1292>;
status = "okay";

bank@0 {
reg = <0>;
Expand All @@ -199,3 +225,56 @@ zephyr_udc0: &usbotg_fs {
};
};
};

&mipi_dsi {
/* DSI HOST dedicated PLL
* F_VCO = CLK_IN / pll-idf * 2 * pll-ndiv
* PHI = F_VCO / 2 / (1 << pll-odf) = lane_byte_clk
* = 8 MHz / 2 * 2 * 125 / 2 / (1<<0) / 8 = 62.5 MHz
*/
pll-ndiv = <125>;
pll-idf = <2>;
pll-odf = <0>;
vs-active-high;
hs-active-high;
de-active-high;
status = "okay";

otm8009a: otm8009a@0 {
compatible = "orisetech,otm8009a";
reg = <0x0>;
height = <800>;
width = <480>;
reset-gpios = <&gpioh 7 0>;
bl-gpios = <&gpioa 3 0>;
data-lanes = <2>;
pixel-format = <MIPI_DSI_PIXFMT_RGB888>;
rotation = <90>;
status = "okay";
};
};

&ltdc {
width = <800>;
height = <480>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_888>;
ext-sdram = <&sdram1>;
def-back-color-red = <0>;
def-back-color-green = <0>;
def-back-color-blue = <0>;
status = "okay";
/* orisetech, otm8009a */
display-timings {
compatible = "zephyr,panel-timing";
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
hsync-len = <2>;
vsync-len = <1>;
hback-porch = <34>;
vback-porch = <15>;
hfront-porch = <34>;
vfront-porch = <16>;
};
};
6 changes: 6 additions & 0 deletions boards/st/stm32f469i_disco/stm32f469i_disco_defconfig
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Expand Up @@ -14,3 +14,9 @@ CONFIG_UART_CONSOLE=y

# enable GPIO
CONFIG_GPIO=y

# Enable External Memory
CONFIG_MEMC=y

# Configure Display
CONFIG_STM32_LTDC_ARGB8888=y
14 changes: 14 additions & 0 deletions dts/arm/st/f4/stm32f469.dtsi
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Expand Up @@ -5,6 +5,7 @@
*/

#include <st/f4/stm32f429.dtsi>
#include <zephyr/dt-bindings/mipi_dsi/mipi_dsi.h>

/ {
soc {
Expand All @@ -24,5 +25,18 @@
usbotg_hs: usb@40040000 {
num-bidir-endpoints = <9>;
};

mipi_dsi: dsihost@40016c00 {
compatible = "st,stm32-mipi-dsi";
reg = <0x40016c00 0x800>;
#address-cells = <1>;
#size-cells = <0>;
clock-names = "dsiclk", "refclk" , "pixelclk";
clocks = <&rcc STM32_CLOCK(APB2, 27)>,
<&rcc STM32_SRC_HSE NO_SEL>,
<&rcc STM32_SRC_PLLSAI_DIVR NO_SEL>;
resets = <&rctl STM32_RESET(APB2, 27)>;
status = "disabled";
};
};
};
4 changes: 4 additions & 0 deletions samples/drivers/display/boards/stm32f469i_disco.conf
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@@ -0,0 +1,4 @@
# Copyright (c) 2025 STMicroelectronics
# SPDX-License-Identifier: Apache-2.0

CONFIG_HEAP_MEM_POOL_SIZE=131072