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drivers: pwm: pwm_nrfx: use standard instantiation #96843

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drivers: pwm: pwm_nrfx: use standard instantiation #96843

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06edd69
soc: nordic: align paths to BSP
magp-nordic Sep 10, 2025
69b8a26
soc: nordic: nrf54h: temporarily change path to nrfx
magp-nordic Sep 11, 2025
d02dda1
modules: hal_nordic: align errata enable macros to nrfx 4.0
nomo-nordic Sep 19, 2025
edd1867
nrfx: align errata checks to nrfx 4.0
nomo-nordic Sep 19, 2025
626e004
drivers: pwm: pwm_nrfx: use standard instantiation
mib1-nordic Oct 1, 2025
0114a25
modules: hal_nordic: remove PWM symbols
mib1-nordic Oct 1, 2025
4cddf65
modules: hal_nordic: add new errno error handling
mib1-nordic Oct 1, 2025
90e42ff
drivers: pwm: pwm_nrfx: Align anomaly 109 handling mechanism
mib1-nordic Oct 13, 2025
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4 changes: 2 additions & 2 deletions drivers/flash/nrf_qspi_nor.c
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Original file line number Diff line number Diff line change
Expand Up @@ -111,7 +111,7 @@ BUILD_ASSERT(INST_0_SCK_FREQUENCY >= (NRF_QSPI_BASE_CLOCK_FREQ / 16),
#define BASE_CLOCK_DIV NRF_CLOCK_HFCLK_DIV_1
#define INST_0_SCK_CFG NRF_QSPI_FREQ_DIV1
/* If anomaly 159 is to be prevented, only /1 divider can be used. */
#elif NRF53_ERRATA_159_ENABLE_WORKAROUND
#elif NRF_ERRATA_STATIC_CHECK(53, 159)
#define BASE_CLOCK_DIV NRF_CLOCK_HFCLK_DIV_1
#define INST_0_SCK_CFG (DIV_ROUND_UP(NRF_QSPI_BASE_CLOCK_FREQ, \
INST_0_SCK_FREQUENCY) - 1)
Expand Down Expand Up @@ -251,7 +251,7 @@ static inline int qspi_get_zephyr_ret_code(nrfx_err_t res)
return -EINVAL;
case NRFX_ERROR_INVALID_STATE:
return -ECANCELED;
#if NRF53_ERRATA_159_ENABLE_WORKAROUND
#if NRF_ERRATA_STATIC_CHECK(53, 159)
case NRFX_ERROR_FORBIDDEN:
LOG_ERR("nRF5340 anomaly 159 conditions detected");
LOG_ERR("Set the CPU clock to 64 MHz before starting QSPI operation");
Expand Down
4 changes: 2 additions & 2 deletions drivers/flash/soc_flash_nrf.c
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Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,7 @@ static inline bool is_uicr_addr_valid(off_t addr, size_t len)
#endif /* CONFIG_SOC_FLASH_NRF_UICR */
}

#if CONFIG_SOC_FLASH_NRF_UICR && IS_ENABLED(NRF91_ERRATA_7_ENABLE_WORKAROUND)
#if CONFIG_SOC_FLASH_NRF_UICR && NRF_ERRATA_STATIC_CHECK(91, 7)
static inline void nrf91_errata_7_enter(void)
{
__disable_irq();
Expand Down Expand Up @@ -159,7 +159,7 @@ static int flash_nrf_read(const struct device *dev, off_t addr,
return 0;
}

#if CONFIG_SOC_FLASH_NRF_UICR && IS_ENABLED(NRF91_ERRATA_7_ENABLE_WORKAROUND)
#if CONFIG_SOC_FLASH_NRF_UICR && NRF_ERRATA_STATIC_CHECK(91, 7)
if (within_uicr) {
nrf_buffer_read_91_uicr(data, (uint32_t)addr, len);
return 0;
Expand Down
13 changes: 1 addition & 12 deletions drivers/pwm/Kconfig.nrfx
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Original file line number Diff line number Diff line change
Expand Up @@ -5,18 +5,7 @@ config PWM_NRFX
bool "nRF PWM nrfx driver"
default y
depends on DT_HAS_NORDIC_NRF_PWM_ENABLED
select NRFX_PWM0 if HAS_HW_NRF_PWM0
select NRFX_PWM1 if HAS_HW_NRF_PWM1
select NRFX_PWM2 if HAS_HW_NRF_PWM2
select NRFX_PWM3 if HAS_HW_NRF_PWM3
select NRFX_PWM20 if HAS_HW_NRF_PWM20
select NRFX_PWM21 if HAS_HW_NRF_PWM21
select NRFX_PWM22 if HAS_HW_NRF_PWM22
select NRFX_PWM120 if HAS_HW_NRF_PWM120
select NRFX_PWM130 if HAS_HW_NRF_PWM130
select NRFX_PWM131 if HAS_HW_NRF_PWM131
select NRFX_PWM132 if HAS_HW_NRF_PWM132
select NRFX_PWM133 if HAS_HW_NRF_PWM133
select NRFX_PWM
select PINCTRL
help
Enable support for nrfx Hardware PWM driver for nRF52 MCU series.
Expand Down
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