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boards: renesas: Add support USB on Renesas ek_ra8p1 and mck_ra8t2 #96958

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650a819
manifest: Update hal_renesas revision to latest
khoa-nguyen-18 Oct 2, 2025
784683d
dts: arm: renesas: ra: Add support USB on Renesas RA8x2 devices
khoa-nguyen-18 Oct 2, 2025
4a07579
boards: renesas: Add support USB on ek_ra8p1 and mck_ra8t2
khoa-nguyen-18 Oct 2, 2025
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16 changes: 16 additions & 0 deletions boards/renesas/ek_ra8p1/ek_ra8p1-pinctrl.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -71,6 +71,22 @@
};
};

usbhs_default: usbhs_default {
group1 {
psels = <RA_PSEL(RA_PSEL_USBHS, 4, 8)>; /* VBUS */
drive-strength = "high";
};
};

usbfs_default: usbfs_default {
group1 {
psels = <RA_PSEL(RA_PSEL_USBFS, 8, 15)>, /* USB_DM */
<RA_PSEL(RA_PSEL_USBFS, 8, 14)>, /* USB_DP */
<RA_PSEL(RA_PSEL_USBFS, 4, 7)>; /* VBUS */
drive-strength = "high";
};
};

sdram_default: sdram_default {
group1 {
psels = <RA_PSEL(RA_PSEL_BUS, 10, 3)>, /* SDRAM_A2 */
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16 changes: 16 additions & 0 deletions boards/renesas/ek_ra8p1/ek_ra8p1.dtsi
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Expand Up @@ -190,6 +190,22 @@
status = "okay";
};

&usbfs {
pinctrl-0 = <&usbfs_default>;
pinctrl-names = "default";
maximum-speed = "full-speed";
};

&usbhs {
pinctrl-0 = <&usbhs_default>;
pinctrl-names = "default";
maximum-speed = "high-speed";
};

&usbhs_phy {
phys-clock-src = "xtal";
};

&sdram {
pinctrl-0 = <&sdram_default>;
pinctrl-names = "default";
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11 changes: 11 additions & 0 deletions boards/renesas/ek_ra8p1/ek_ra8p1_r7ka8p1kflcac_cm85.dts
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Expand Up @@ -108,3 +108,14 @@
zephyr_lcdif: &lcdif {};

pmod_sd_shield: &sdhc0 {};

&usbhs {
pinctrl-0 = <&usbhs_default>;
interrupts = <20 12>;
interrupt-names = "usbhs-ir";
status = "okay";

zephyr_udc0: udc {
status = "okay";
};
};
9 changes: 9 additions & 0 deletions boards/renesas/mck_ra8t2/mck_ra8t2-pinctrl.dtsi
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Expand Up @@ -40,6 +40,15 @@
};
};

usbfs_default: usbfs_default {
group1 {
psels = <RA_PSEL(RA_PSEL_USBFS, 8, 15)>, /* USB_DM */
<RA_PSEL(RA_PSEL_USBFS, 8, 14)>, /* USB_DP */
<RA_PSEL(RA_PSEL_USBFS, 4, 7)>; /* VBUS */
drive-strength = "high";
};
};

sdhc0_default: sdhc0_default {
group1 {
psels = <RA_PSEL(RA_PSEL_SDHI, 13, 7)>, /* SDCD */
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10 changes: 10 additions & 0 deletions boards/renesas/mck_ra8t2/mck_ra8t2.dtsi
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Expand Up @@ -88,6 +88,10 @@
};
};

&uclk {
status = "okay";
};

&flash {
flash0: flash@2000000 {
compatible = "soc-nv-flash";
Expand Down Expand Up @@ -118,3 +122,9 @@
&ioportb {
status = "okay";
};

&usbfs {
pinctrl-0 = <&usbfs_default>;
pinctrl-names = "default";
maximum-speed = "full-speed";
};
11 changes: 11 additions & 0 deletions boards/renesas/mck_ra8t2/mck_ra8t2_r7ka8t2lfecac_cm85.dts
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Expand Up @@ -91,3 +91,14 @@
status = "okay";
};
};

&usbfs {
pinctrl-0 = <&usbfs_default>;
interrupts = <16 12>, <17 12>;
interrupt-names = "usbfs-i", "usbfs-r";
status = "okay";

zephyr_udc0: udc {
status = "okay";
};
};
2 changes: 2 additions & 0 deletions dts/arm/renesas/ra/ra8/r7ka8t2xf.dtsi
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Expand Up @@ -7,6 +7,8 @@
#include <arm/renesas/ra/ra8/ra8x2.dtsi>
#include <zephyr/dt-bindings/clock/ra_clock.h>

/delete-node/ &usbhs;

Comment on lines +10 to +11
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The usbhs_phy also need to be removed

Suggested change
/delete-node/ &usbhs;
/delete-node/ &usbhs;
/delete-node/ &usbhs_phy;

/ {
clocks: clocks {
#address-cells = <1>;
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38 changes: 38 additions & 0 deletions dts/arm/renesas/ra/ra8/ra8x2.dtsi
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Expand Up @@ -734,6 +734,34 @@
};
};

usbfs: usbfs@40250000 {
compatible = "renesas,ra-usbfs";
reg = <0x40250000 0x2000>;
num-bidir-endpoints = <10>;
phys = <&usbfs_phy>;
phys-clock = <&uclk>;
status = "disabled";

udc {
compatible = "renesas,ra-udc";
status = "disabled";
};
};

usbhs: usbhs@40351000 {
compatible = "renesas,ra-usbhs";
reg = <0x40351000 0x2000>;
num-bidir-endpoints = <10>;
phys = <&usbhs_phy>;
phys-clock = <&uclk>, <&usb60clk>;
status = "disabled";

udc {
compatible = "renesas,ra-udc";
status = "disabled";
};
};

port_irq0: external-interrupt@40006000 {
compatible = "renesas,ra-external-interrupt";
reg = <0x40006000 0x1>;
Expand Down Expand Up @@ -1123,6 +1151,16 @@
};
};
};

usbfs_phy: usbfs-phy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};

usbhs_phy: usbhs-phy {
compatible = "renesas,ra-usbphyc";
#phy-cells = <0>;
};
};

&nvic {
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2 changes: 1 addition & 1 deletion west.yml
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Expand Up @@ -226,7 +226,7 @@ manifest:
- hal
- name: hal_renesas
path: modules/hal/renesas
revision: d8ee5f18e95b9f4616a481be65e2c9ee0af1779f
revision: pull/152/head
groups:
- hal
- name: hal_rpi_pico
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