add SDHC support for TI MMCSD subsystem

boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0-pinctrl.dtsi

@@ -40,6 +40,42 @@
 	spi0_d1: spi0_d1_default {
 		pinmux = <K3_PINMUX(0x218, PIN_OUTPUT, MUX_MODE_0)>;
 	};
+
+	mmc1_cmd: mmc1_cmd_default {
+		pinmux = <K3_PINMUX(0x0294, PIN_INPUT_PULLUP, MUX_MODE_0)>;
+	};
+
+	mmc1_clk: mmc1_clk_default {
+		pinmux = <K3_PINMUX(0x028c, PIN_INPUT, MUX_MODE_0)>;
+	};
+
+	mmc1_dat0: mmc1_dat0_default {
+		pinmux = <K3_PINMUX(0x0288, PIN_INPUT_PULLUP, MUX_MODE_0)>;
+	};
+
+	mmc1_dat1: mmc1_dat1_default {
+		pinmux = <K3_PINMUX(0x0284, PIN_INPUT_PULLUP, MUX_MODE_0)>;
+	};
+
+	mmc1_dat2: mmc1_dat2_default {
+		pinmux = <K3_PINMUX(0x0280, PIN_INPUT_PULLUP, MUX_MODE_0)>;
+	};
+
+	mmc1_dat3: mmc1_dat3_default {
+		pinmux = <K3_PINMUX(0x027c, PIN_INPUT_PULLUP, MUX_MODE_0)>;
+	};
+
+	mmc1_sdcd: mmc1_sdcd_default {
+		pinmux = <K3_PINMUX(0x0298, PIN_INPUT_PULLUP, MUX_MODE_0)>;
+	};
+
+	mmc1_sdwp: mmc1_sdwp_default {
+		pinmux = <K3_PINMUX(0x029c, PIN_INPUT, MUX_MODE_0)>;
+	};
+
+	mmc1_clklb: mmc1_clklb_default {
+		pinmux = <K3_PINMUX(0x0290, PIN_INPUT, MUX_MODE_0)>;
+	};
 };
 
 &mcu_pinctrl {

boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0.dts

@@ -187,3 +187,25 @@
 	usr-id = <0>;
 	status = "okay";
 };
+
+&main_sdhci0 {
+	status = "okay";
+
+	mmc {
+		compatible = "zephyr,mmc-disk";
+		bus-width = <8>;
+		disk-name = "mmc0";
+	};
+};
+
+&main_sdhci1 {
+	status = "okay";
+	pinctrl-0 = <&mmc1_cmd &mmc1_clk &mmc1_dat0 &mmc1_dat1 &mmc1_dat2 &mmc1_dat2 &mmc1_dat3
+		     &mmc1_sdcd &mmc1_clklb>;
+	pinctrl-names = "default";
+
+	sd {
+		compatible = "zephyr,sdmmc-disk";
+		disk-name = "sd0";
+	};
+};

doc/releases/migration-guide-4.3.rst

@@ -81,6 +81,12 @@ Phy
   clock-reference. The selection directly depends on the value on OTGHSSEL (OTG_HS PHY kernel
   clock source selection) located in the RCC_CCIPR2 register.
 
+SD Host Controller
+==================
+
+* Moved extra fields from :c:struct:`sdhc_host_caps` to :c:struct:`sdhc_host_props` as per the
+  `SD Host Controller Specification <https://www.sdcard.org/downloads/pls/pdf/?p=PartA2_SD%20Host_Controller_Simplified_Specification_Ver4.20.jpg>`_.
+
 Sensors
 =======
 

drivers/sdhc/CMakeLists.txt

@@ -18,4 +18,5 @@ zephyr_library_sources_ifdef(CONFIG_SDHC_MAX32 sdhc_max32.c)
 zephyr_library_sources_ifdef(CONFIG_SDHC_AMBIQ sdhc_ambiq.c)
 zephyr_library_sources_ifdef(CONFIG_XLNX_SDHC xlnx_sdhc.c)
 zephyr_library_sources_ifdef(CONFIG_SDHC_STM32_SDIO sdhc_stm32.c)
+zephyr_library_sources_ifdef(CONFIG_SDHC_TI_AM654 sdhc_ti_am654.c)
 endif()

drivers/sdhc/Kconfig

@@ -23,6 +23,7 @@ source "drivers/sdhc/Kconfig.max32"
 source "drivers/sdhc/Kconfig.ambiq"
 source "drivers/sdhc/Kconfig.xlnx"
 source "drivers/sdhc/Kconfig.stm32"
+source "drivers/sdhc/Kconfig.ti"
 
 config SDHC_INIT_PRIORITY
 	int "SDHC driver init priority"

drivers/sdhc/Kconfig.ti

@@ -0,0 +1,33 @@
+config SDHC_TI_AM654
+	bool "TI AM654 SDHC driver"
+	select SDHC_SUPPORTS_NATIVE_MODE
+	select SDHC_SUPPORTS_UHS
+	select EVENTS
+	select REGULATOR
+	select GPIO
+	default y
+	depends on DT_HAS_TI_AM654_SDHCI_ENABLED
+
+	help
+	  Interrupt based TI AM654 SD/eMMC Host controller
+
+if SDHC_TI_AM654
+config SDHC_TI_AM654_ENABLE_ADMA
+	bool "ADMA2"
+	default y
+	select CACHE_MANAGEMENT if CPU_HAS_DCACHE
+	help
+	  Enable ADMA2 for TI AM654 SDHC driver
+
+config SDHC_TI_AM654_ENABLE_AUTO_STOP
+	bool "Auto-stop commands"
+	default y
+	help
+	  Enable auto-CMD12/CMD23 during multi-block transactions
+
+config SDHC_TI_AM654_ADMA_DESC_LEN
+	int "Maximum ADMA descriptor lines"
+	default 32
+	help
+	  Maximum number of ADMA descriptor lines allowed
+endif

drivers/sdhc/ifx_cat1_sdio.c

@@ -208,7 +208,7 @@ static int ifx_cat1_sdio_get_host_props(const struct device *dev, struct sdhc_ho
 	memset(props, 0, sizeof(*props));
 	props->f_max = IFX_CAT1_SDIO_F_MAX;
 	props->f_min = IFX_CAT1_SDIO_F_MIN;
-	props->host_caps.bus_4_bit_support = true;
+	props->bus_4_bit_support = true;
 	props->host_caps.high_spd_support = true;
 	props->host_caps.sdr50_support = true;
 	props->host_caps.sdio_async_interrupt_support = true;

drivers/sdhc/imx_usdhc.c

@@ -264,9 +264,9 @@ static void imx_usdhc_init_host_props(const struct device *dev)
 	props->host_caps.sdr104_support = (bool)(caps.flags & kUSDHC_SupportSDR104Flag);
 	props->host_caps.sdr50_support = (bool)(caps.flags & kUSDHC_SupportSDR50Flag);
 	props->host_caps.bus_8_bit_support = (bool)(caps.flags & kUSDHC_Support8BitFlag);
-	props->host_caps.bus_4_bit_support = (bool)(caps.flags & kUSDHC_Support4BitFlag);
-	props->host_caps.hs200_support = (bool)(cfg->mmc_hs200_1_8v);
-	props->host_caps.hs400_support = (bool)(cfg->mmc_hs400_1_8v);
+	props->bus_4_bit_support = (bool)(caps.flags & kUSDHC_Support4BitFlag);
+	props->hs200_support = (bool)(cfg->mmc_hs200_1_8v);
+	props->hs400_support = (bool)(cfg->mmc_hs400_1_8v);
 }
 
 /*

drivers/sdhc/intel_emmc_host.c

@@ -1168,9 +1168,9 @@ static int emmc_get_host_props(const struct device *dev, struct sdhc_host_props
 	props->host_caps.sdr104_support = (bool)(cap & BIT(33u));
 	props->host_caps.sdr50_support = (bool)(cap & BIT(32u));
 	props->host_caps.bus_8_bit_support = true;
-	props->host_caps.bus_4_bit_support = true;
-	props->host_caps.hs200_support = (bool)config->hs200_mode;
-	props->host_caps.hs400_support = (bool)config->hs400_mode;
+	props->bus_4_bit_support = true;
+	props->hs200_support = (bool)config->hs200_mode;
+	props->hs400_support = (bool)config->hs400_mode;
 
 	emmc->props = *props;
 

drivers/sdhc/rcar_mmc.c

@@ -1206,7 +1206,7 @@ static int rcar_mmc_set_bus_width(const struct device *dev, struct sdhc_io *ios)
 		reg_width = RCAR_MMC_OPTION_WIDTH_1;
 		break;
 	case SDHC_BUS_WIDTH4BIT:
-		if (data->props.host_caps.bus_4_bit_support) {
+		if (data->props.bus_4_bit_support) {
 			reg_width = RCAR_MMC_OPTION_WIDTH_4;
 		} else {
 			LOG_ERR("SDHC I/O: 4-bits bus width isn't supported");
@@ -1331,7 +1331,7 @@ static int rcar_mmc_set_timings(const struct device *dev, struct sdhc_io *ios)
 		}
 		break;
 	case SDHC_TIMING_HS400:
-		if (!data->props.host_caps.hs400_support) {
+		if (!data->props.hs400_support) {
 			LOG_ERR("SDHC I/O: HS400 timing isn't supported");
 			return -ENOTSUP;
 		}
@@ -1347,7 +1347,7 @@ static int rcar_mmc_set_timings(const struct device *dev, struct sdhc_io *ios)
 		data->ddr_mode = 1;
 		break;
 	case SDHC_TIMING_HS200:
-		if (!data->props.host_caps.hs200_support) {
+		if (!data->props.hs200_support) {
 			LOG_ERR("SDHC I/O: HS200 timing isn't supported");
 			return -ENOTSUP;
 		}
@@ -1947,7 +1947,7 @@ static void rcar_mmc_init_host_props(const struct device *dev)
 	case SDHC_BUS_WIDTH8BIT:
 		host_caps->bus_8_bit_support = 1;
 	case SDHC_BUS_WIDTH4BIT:
-		host_caps->bus_4_bit_support = 1;
+		props->bus_4_bit_support = 1;
 	default:
 		break;
 	}
@@ -1958,9 +1958,9 @@ static void rcar_mmc_init_host_props(const struct device *dev)
 	host_caps->sdr50_support = cfg->uhs_support;
 	/* neither Linux nor U-boot support DDR50 mode, that's why we don't support it too */
 	host_caps->ddr50_support = 0;
-	host_caps->hs200_support = cfg->mmc_hs200_1_8v;
+	props->hs200_support = cfg->mmc_hs200_1_8v;
 	/* TODO: add support */
-	host_caps->hs400_support = 0;
+	props->hs400_support = 0;
 #endif
 
 	host_caps->vol_330_support =

drivers/sdhc/sdhc_ambiq.c

@@ -164,13 +164,13 @@ static int ambiq_sdio_get_host_props(const struct device *dev, struct sdhc_host_
 	props->host_caps.adma_2_support = true;
 	props->host_caps.sdio_async_interrupt_support = true;
 	props->host_caps.vol_180_support = true;
-	props->host_caps.bus_4_bit_support = true;
 	props->host_caps.bus_8_bit_support = true;
 	props->host_caps.high_spd_support = true;
 	props->host_caps.sdr50_support = true;
 	props->host_caps.sdr104_support = true;
 	props->host_caps.ddr50_support = true;
-	props->host_caps.hs200_support = true;
+	props->bus_4_bit_support = true;
+	props->hs200_support = true;
 	props->max_current_330 = 1020;
 	props->max_current_300 = 1020;
 	props->max_current_180 = 1020;

drivers/sdhc/sdhc_esp32.c

@@ -1444,11 +1444,10 @@ static DEVICE_API(sdhc, sdhc_api) = {
 					.ddr50_support = false,                                    \
 					.sdr104_support = false,                                   \
 					.sdr50_support = false,                                    \
-					.bus_8_bit_support = false,                                \
-					.bus_4_bit_support =                                       \
-						(DT_INST_PROP(n, bus_width) == 4) ? true : false,  \
-					.hs200_support = false,                                    \
-					.hs400_support = false}}};                                 \
+					.bus_8_bit_support = false},                               \
+			  .bus_4_bit_support = (DT_INST_PROP(n, bus_width) == 4) ? true : false,   \
+			  .hs200_support = false,                                                  \
+			  .hs400_support = false}};                                                \
                                                                                                    \
 	static struct sdhc_esp32_data sdhc_esp32_##n##_data = {                                    \
 		.bus_width = SDMMC_SLOT_WIDTH_DEFAULT,                                             \

drivers/sdhc/sdhc_max32.c

@@ -94,7 +94,7 @@ static void sdhc_max32_init_props(const struct device *dev)
 	sdhc_data->props.host_caps.sd_base_clk = 0x00;
 	sdhc_data->props.host_caps.max_blk_len = 0b10;
 	sdhc_data->props.host_caps.bus_8_bit_support = false;
-	sdhc_data->props.host_caps.bus_4_bit_support = false;
+	sdhc_data->props.bus_4_bit_support = false;
 	sdhc_data->props.host_caps.adma_2_support = true;
 	sdhc_data->props.host_caps.high_spd_support = true;
 	sdhc_data->props.host_caps.sdma_support = true;
@@ -119,8 +119,8 @@ static void sdhc_max32_init_props(const struct device *dev)
 	sdhc_data->props.host_caps.clk_multiplier = 0;
 	sdhc_data->props.host_caps.adma3_support = false;
 	sdhc_data->props.host_caps.vdd2_180_support = false;
-	sdhc_data->props.host_caps.hs200_support = false;
-	sdhc_data->props.host_caps.hs400_support = false;
+	sdhc_data->props.hs200_support = false;
+	sdhc_data->props.hs400_support = false;
 	sdhc_data->props.power_delay = sdhc_config->power_delay_ms;
 }
 

drivers/sdhc/sdhc_renesas_ra.c

@@ -721,12 +721,11 @@ static DEVICE_API(sdhc, sdhc_api) = {
 					.ddr50_support = false,                                    \
 					.sdr104_support = false,                                   \
 					.sdr50_support = false,                                    \
-					.bus_8_bit_support = false,                                \
-					.bus_4_bit_support = (DT_INST_PROP(index, bus_width) == 4) \
-								     ? true                        \
-								     : false,                      \
-					.hs200_support = false,                                    \
-					.hs400_support = false}},                                  \
+					.bus_8_bit_support = false},                               \
+			  .bus_4_bit_support =                                                     \
+				  (DT_INST_PROP(index, bus_width) == 4) ? true : false,            \
+			  .hs200_support = false,                                                  \
+			  .hs400_support = false},                                                 \
 		RA_SDHI_EN(index),                                                                 \
 		RA_SDMMC_DTC_STRUCT_INIT(index)};                                                  \
                                                                                                    \

drivers/sdhc/sdhc_stm32.c

@@ -543,7 +543,7 @@ static void sdhc_stm32_init_props(const struct device *dev)
 	props->host_caps.vol_330_support = true;
 	props->host_caps.vol_180_support = sdhc_config->support_1_8_v;
 	props->host_caps.bus_8_bit_support = (sdhc_config->bus_width == SDHC_BUS_WIDTH8BIT);
-	props->host_caps.bus_4_bit_support = (sdhc_config->bus_width == SDHC_BUS_WIDTH4BIT);
+	props->bus_4_bit_support = (sdhc_config->bus_width == SDHC_BUS_WIDTH4BIT);
 }
 
 static int sdhc_stm32_get_host_props(const struct device *dev, struct sdhc_host_props *props)