STM32: add ethernet support to stm32h7rs #97364
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Add ethernet node with mac and mdio subnodes to dts similar to h7-family. Signed-off-by: Thomas Decker <[email protected]>
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Hello @TD-JBL , thanks for the contribution. Could you add the pin layout used for the Ethernet in the index.rst of the board in the last commit?
In the Default Zephyr Peripheral Mapping part :
+ -ETH : PA2, PA7, PB6, PG4, PG5, PG6, PG11, PG12, PG13Otherwise it looks goods to me
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Sure, added the documentation. I also fixed a wrong heading format in this file (I added with FDCAN documentation). Is it ok to add this in a extra commit to this PR? |
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Add SOC_SERIES_STM32H7RSX to applicable Kconfig parameters and enable use of .eth_stm32_desc and .eth_stm32_buf linker sections for ethernet dma. Signed-off-by: Thomas Decker <[email protected]>
Add ethernet DMA buffer/descriptor region (sram2) and read only flash region 0x08FFF800 with unique device ID registers to MPU region list. The unique device ID is used to create a random mac address by the ethernet driver. Ethernet DMA buffer/descriptor memory section is also added to linker script. Signed-off-by: Thomas Decker <[email protected]>
Enable support for ethernet on nucleo_h7s3l8 board. Signed-off-by: Thomas Decker <[email protected]>
Fix wrong heading type in index.rst introduced with PR zephyrproject-rtos#95388 Signed-off-by: Thomas Decker <[email protected]>
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@juickar PTAL |
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| @@ -26,6 +26,20 @@ static const struct arm_mpu_region mpu_regions[] = { | |||
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| /* Region 3 */ | |||
| MPU_REGION_ENTRY("SRAM_0", CONFIG_SRAM_BASE_ADDRESS, REGION_RAM_ATTR(REGION_SRAM_SIZE)), | |||
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| /* Region 4 - Ready only flash with unique device id */ | |||
| MPU_REGION_ENTRY("ID", 0x08FFF800, REGION_FLASH_ATTR(REGION_2K)), | |||
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@djiatsaf-st Can you confirm this is ok with you wrt #97731 ?
I guess name could be either but size may be adapted ?
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I confirm that it works well
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Please also read my comment on PR #97731 about MPU configuration issues between this two PRs
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My comment has a pending note next to it. Not sure for what it is waiting for. I'm not yet very familiar with the GitHub user interface....
I quote my comment from the other PR:
My PR #97364 most likely gets a problem with adding the memory attribute to sram2, because the order of MPU region initialization (see arm_mpu.c):
- elements from mpu_regions.c
- entries from the device tree with zephyr,memory-attr property
- entries resulting from CONFIG_USERSPACE, CONFIG_NOCACHE_MEMORY etc
- dynamic entries
As later defined regions overlapping earlier ones have a higher priority (called region overlay), the ATTR_MPU_RAM from dt will overlay the REGION_RAM_NOCACHE_ATTR / REGION_PPB_ATTR from my PR's mpu_regions.c. Never tried to overlay a smaller region with a bigger one, so maybe this is even illegal? Anyway, I need to figure a way to define my DMA memory regions after it is configured as standard memory.
I see the point of this change (and use it in my custom boards dts for other mem nodes), but how can I solve this?
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Not sure for what it is waiting for.
You need to submit your review (green button in the upper right)
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This PR adds ethernet support for STM32H7RS series microcontrollers.
It's almost a 1:1 copy of h7x ethernet configuration. Only register addresses, clock sources and interrupt numbers changed in device tree and the used RAM for DMA buffer.
Changes:
SOC_SERIES_STM32H7RSXwhere appicable next toSOC_SERIES_STM32H7X.Used DMA memory
As all h7rs variants have the same memory configuration, there is no need to support multiple memories as DMA buffer.
sram1andsram2(AHB SRAM1 and AHB SRAM2) are identical, so I hardcoded the DMA buffer intosram2.At first I tried not defining any special memory and let the driver use the NOCACHE memory, but after reading #29915 and #30403 I decided to keep it as near as possible to the h7x implementation.
Edit: Is it possible or useful to add a Kconfig option or dts property to select the used sram node?
0x08FFF800 read only flash region with unique device ID registers
The controller memfaults without this region in the MPU list while trying to read the uniqe device ID registers. The PR #94019 introduced a different way of preventing speculative access in entire memory space than the one used for h7x:
MPU_REGION_ENTRY("UNMAPPED", 0, {REGION_4G | MPU_RASR_XN_Msk | P_NA_U_NA_Msk}),Every accessed memory must get a MPU region after blocking access to the complete memory space with this entry.
The unique device ID is used to create a random mac address by the ethernet driver in some conditions.
Testing Status:
Maybe someone more familiar with running mcuboot+samples on this board can run some tests?