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STM32 ADC: Rename sequencer and oversampler and fix macro issue #97525

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STM32 ADC: Rename sequencer and oversampler and fix macro issue #97525

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40 changes: 21 additions & 19 deletions drivers/adc/adc_stm32.c
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Original file line number Diff line number Diff line change
Expand Up @@ -86,8 +86,8 @@ LOG_MODULE_REGISTER(adc_stm32);
#define ASYNC 2

/* Sequencer type */
#define NOT_FULLY_CONFIGURABLE 0
#define FULLY_CONFIGURABLE 1
#define SEQUENCER_FIXED 0
#define SEQUENCER_PROGRAMMABLE 1

/* Oversampler type */
#define OVERSAMPLER_NONE 0
Expand All @@ -107,17 +107,17 @@ LOG_MODULE_REGISTER(adc_stm32);
#define ANY_ADC_SEQUENCER_TYPE_IS(value) \
(DT_INST_FOREACH_STATUS_OKAY_VARGS(IS_EQ_STRING_PROP, \
st_adc_sequencer,\
value) 0)
value, SEQUENCER_) 0)

#define ANY_ADC_OVERSAMPLER_TYPE_IS(value) \
(DT_INST_FOREACH_STATUS_OKAY_VARGS(IS_EQ_STRING_PROP, \
st_adc_oversampler,\
value) 0)
value, OVERSAMPLER_) 0)

#define ANY_ADC_INTERNAL_REGULATOR_TYPE_IS(value) \
(DT_INST_FOREACH_STATUS_OKAY_VARGS(IS_EQ_STRING_PROP, \
st_adc_internal_regulator,\
value) 0)
value, INTERNAL_REGULATOR_) 0)

#define ANY_ADC_HAS_DEEP_POWERDOWN \
(DT_INST_FOREACH_STATUS_OKAY_VARGS(IS_EQ_PROP_OR, \
Expand Down Expand Up @@ -145,13 +145,13 @@ LOG_MODULE_REGISTER(adc_stm32);
#define IS_EQ_NODE_PROP_OR(node, prop, default_value, compare_value) \
IS_EQ(DT_PROP_OR(node, prop, default_value), compare_value) ||

#define IS_EQ_STRING_PROP(inst, prop, compare_value) \
IS_EQ(DT_INST_STRING_UPPER_TOKEN(inst, prop), compare_value) ||
#define IS_EQ_STRING_PROP(inst, prop, compare_value, prefix) \
IS_EQ(CONCAT(prefix, DT_INST_STRING_UPPER_TOKEN(inst, prop)), compare_value) ||

/* reference voltage for the ADC */
#define STM32_ADC_VREF_MV DT_INST_PROP(0, vref_mv)

#if ANY_ADC_SEQUENCER_TYPE_IS(FULLY_CONFIGURABLE)
#if ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_PROGRAMMABLE)

#if defined(LL_ADC_REG_RANK_28)
#define MAX_RANK 28
Expand All @@ -172,7 +172,7 @@ static const uint32_t table_seq_len[] = {
LISTIFY(UTIL_DEC(MAX_RANK), SEQ_LEN, (,))
};

#endif /* ANY_ADC_SEQUENCER_TYPE_IS(FULLY_CONFIGURABLE) */
#endif /* ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_PROGRAMMABLE) */

/* Number of different sampling time values */
#define STM32_NB_SAMPLING_TIME 8
Expand Down Expand Up @@ -946,8 +946,8 @@ static int set_sequencer(const struct device *dev)

channels_mask |= channel;

#if ANY_ADC_SEQUENCER_TYPE_IS(FULLY_CONFIGURABLE)
if (config->sequencer_type == FULLY_CONFIGURABLE) {
#if ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_PROGRAMMABLE)
if (config->sequencer_type == SEQUENCER_PROGRAMMABLE) {
#if ANY_ADC_HAS_CHANNEL_PRESELECTION
if (config->has_channel_preselection) {
/*
Expand All @@ -961,11 +961,11 @@ static int set_sequencer(const struct device *dev)
LL_ADC_REG_SetSequencerRanks(adc, table_rank[channel_index], channel);
LL_ADC_REG_SetSequencerLength(adc, table_seq_len[channel_index]);
}
#endif /* ANY_ADC_SEQUENCER_TYPE_IS(FULLY_CONFIGURABLE) */
#endif /* ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_PROGRAMMABLE) */
}

#if ANY_ADC_SEQUENCER_TYPE_IS(NOT_FULLY_CONFIGURABLE)
if (config->sequencer_type == NOT_FULLY_CONFIGURABLE) {
#if ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_FIXED)
if (config->sequencer_type == SEQUENCER_FIXED) {
LL_ADC_REG_SetSequencerChannels(adc, channels_mask);

#ifdef LL_ADC_FLAG_CCRDY
Expand All @@ -978,7 +978,7 @@ static int set_sequencer(const struct device *dev)
LL_ADC_ClearFlag_CCRDY(adc);
#endif /* LL_ADC_FLAG_CCRDY */
}
#endif /* ANY_ADC_SEQUENCER_TYPE_IS(NOT_FULLY_CONFIGURABLE) */
#endif /* ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_FIXED) */

#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_adc) || \
DT_HAS_COMPAT_STATUS_OKAY(st_stm32f4_adc)
Expand Down Expand Up @@ -1006,12 +1006,12 @@ static int start_read(const struct device *dev,
return -EINVAL;
}

#if ANY_ADC_SEQUENCER_TYPE_IS(FULLY_CONFIGURABLE)
#if ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_PROGRAMMABLE)
if (data->channel_count > ARRAY_SIZE(table_seq_len)) {
LOG_ERR("Too many channels for sequencer. Max: %d", ARRAY_SIZE(table_seq_len));
return -EINVAL;
}
#endif /* ANY_ADC_SEQUENCER_TYPE_IS(FULLY_CONFIGURABLE) */
#endif /* ANY_ADC_SEQUENCER_TYPE_IS(SEQUENCER_PROGRAMMABLE) */

#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_adc) && !defined(CONFIG_ADC_STM32_DMA)
/* Multiple samplings is only supported with DMA for F1 */
Expand Down Expand Up @@ -1974,8 +1974,10 @@ static const struct adc_stm32_cfg adc_stm32_cfg_##index = { \
.clk_prescaler = ADC_STM32_DT_PRESC(index), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
.differential_channels_used = (ANY_CHILD_NODE_IS_DIFFERENTIAL(index) > 0), \
.sequencer_type = DT_INST_STRING_UPPER_TOKEN(index, st_adc_sequencer), \
.oversampler_type = DT_INST_STRING_UPPER_TOKEN(index, st_adc_oversampler), \
.sequencer_type = CONCAT(SEQUENCER_, \
DT_INST_STRING_UPPER_TOKEN(index, st_adc_sequencer)), \
.oversampler_type = CONCAT(OVERSAMPLER_, \
DT_INST_STRING_UPPER_TOKEN(index, st_adc_oversampler)), \
.internal_regulator = CONCAT(INTERNAL_REGULATOR_, \
DT_INST_STRING_UPPER_TOKEN(index, st_adc_internal_regulator)), \
.has_deep_powerdown = DT_INST_PROP(index, st_adc_has_deep_powerdown), \
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/c0/stm32c0.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -466,8 +466,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <2 4 8 13 20 40 80 161>;
num-sampling-time-common-channels = <2>;
st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_MINIMAL";
st,adc-sequencer = "fixed";
st,adc-oversampler = "minimal";
st,adc-internal-regulator = "startup-sw-delay";
status = "disabled";
};
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/f0/stm32f0.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -354,8 +354,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <2 8 14 29 42 56 72 240>;
num-sampling-time-common-channels = <1>;
st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "fixed";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/f1/stm32f1.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -397,8 +397,8 @@
#io-channel-cells = <1>;
resolutions = <STM32F1_ADC_RES(12)>;
sampling-times = <2 8 14 29 42 56 72 240>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
8 changes: 4 additions & 4 deletions dts/arm/st/f1/stm32f103Xc.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -137,8 +137,8 @@
#io-channel-cells = <1>;
resolutions = <STM32F1_ADC_RES(12)>;
sampling-times = <2 8 14 29 42 56 72 240>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand All @@ -151,8 +151,8 @@
#io-channel-cells = <1>;
resolutions = <STM32F1_ADC_RES(12)>;
sampling-times = <2 8 14 29 42 56 72 240>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/f2/stm32f2.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -377,8 +377,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 58 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/f3/stm32f302.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -118,8 +118,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <2 3 5 8 20 62 182 602>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-differential-support;
status = "disabled";
Expand Down
8 changes: 4 additions & 4 deletions dts/arm/st/f3/stm32f303.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -154,8 +154,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <2 3 5 8 20 62 182 602>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-differential-support;
status = "disabled";
Expand All @@ -173,8 +173,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <2 3 5 8 20 62 182 602>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-differential-support;
status = "disabled";
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/f3/stm32f334.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -93,8 +93,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <2 3 5 8 20 62 182 602>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-differential-support;
status = "disabled";
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/f3/stm32f373.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -258,8 +258,8 @@
#io-channel-cells = <1>;
resolutions = <STM32F1_ADC_RES(12)>;
sampling-times = <2 8 14 29 42 56 72 240>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/f4/stm32f4.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -562,8 +562,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
8 changes: 4 additions & 4 deletions dts/arm/st/f4/stm32f405.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -264,8 +264,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand All @@ -282,8 +282,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
8 changes: 4 additions & 4 deletions dts/arm/st/f4/stm32f446.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -124,8 +124,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand All @@ -142,8 +142,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
12 changes: 6 additions & 6 deletions dts/arm/st/f7/stm32f7.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -819,8 +819,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand All @@ -837,8 +837,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand All @@ -855,8 +855,8 @@
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 15 28 56 84 112 144 480>;
st,adc-clock-source = "SYNC";
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_NONE";
st,adc-sequencer = "programmable";
st,adc-oversampler = "none";
st,adc-internal-regulator = "none";
status = "disabled";
};
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/g0/stm32g0.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -455,8 +455,8 @@
*/
sampling-times = <3 5 8 13 20 40 80 161>;
num-sampling-time-common-channels = <2>;
st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_MINIMAL";
st,adc-sequencer = "fixed";
st,adc-oversampler = "minimal";
st,adc-internal-regulator = "startup-sw-delay";
status = "disabled";
};
Expand Down
8 changes: 4 additions & 4 deletions dts/arm/st/g4/stm32g4.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -118,8 +118,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 7 13 25 48 93 248 641>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_MINIMAL";
st,adc-sequencer = "programmable";
st,adc-oversampler = "minimal";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-deep-powerdown;
st,adc-has-differential-support;
Expand All @@ -137,8 +137,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 7 13 25 48 93 248 641>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_MINIMAL";
st,adc-sequencer = "programmable";
st,adc-oversampler = "minimal";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-deep-powerdown;
st,adc-has-differential-support;
Expand Down
8 changes: 4 additions & 4 deletions dts/arm/st/g4/stm32g473.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -46,8 +46,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 7 13 25 48 93 248 641>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_MINIMAL";
st,adc-sequencer = "programmable";
st,adc-oversampler = "minimal";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-deep-powerdown;
st,adc-has-differential-support;
Expand All @@ -65,8 +65,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 7 13 25 48 93 248 641>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_MINIMAL";
st,adc-sequencer = "programmable";
st,adc-oversampler = "minimal";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-deep-powerdown;
st,adc-has-differential-support;
Expand Down
4 changes: 2 additions & 2 deletions dts/arm/st/g4/stm32g491.dtsi
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Expand Up @@ -72,8 +72,8 @@
STM32_ADC_RES(8, 0x02)
STM32_ADC_RES(6, 0x03)>;
sampling-times = <3 7 13 25 48 93 248 641>;
st,adc-sequencer = "FULLY_CONFIGURABLE";
st,adc-oversampler = "OVERSAMPLER_MINIMAL";
st,adc-sequencer = "programmable";
st,adc-oversampler = "minimal";
st,adc-internal-regulator = "startup-sw-delay";
st,adc-has-deep-powerdown;
st,adc-has-differential-support;
Expand Down
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