drivers: misc: ethos_u: Add support NPU on Renesas devices

boards/renesas/ek_ra8p1/Kconfig.defconfig

@@ -10,4 +10,12 @@ config SD_CMD_TIMEOUT
 
 endif # DISK_DRIVER_SDMMC
 
+if ETHOS_U
+
+choice ETHOS_U_NPU_CONFIG
+	default ETHOS_U55_256
+endchoice # ETHOS_U_NPU_CONFIG
+
+endif # ETHOS_U
+
 endif # BOARD_EK_RA8P1

drivers/misc/ethos_u/CMakeLists.txt

@@ -6,3 +6,4 @@ zephyr_library()
 zephyr_library_sources(ethos_u_common.c)
 zephyr_library_sources_ifdef(CONFIG_ETHOS_U_ARM ethos_u_arm.c)
 zephyr_library_sources_ifdef(CONFIG_ETHOS_U_NUMAKER ethos_u_numaker.c)
+zephyr_library_sources_ifdef(CONFIG_ETHOS_U_RENESAS ethos_u_renesas.c)

drivers/misc/ethos_u/Kconfig

@@ -6,6 +6,7 @@ choice
 	depends on ETHOS_U
 	default ETHOS_U_ARM if DT_HAS_ARM_ETHOS_U_ENABLED
 	default ETHOS_U_NUMAKER if DT_HAS_NUVOTON_NUMAKER_NPU_ENABLED
+	default ETHOS_U_RENESAS if DT_HAS_RENESAS_RA_NPU_ENABLED
 
 config ETHOS_U_ARM
 	bool "Arm Ethos-U NPU driver"
@@ -17,6 +18,11 @@ config ETHOS_U_NUMAKER
 	help
 	  Enables Nuvoton NuMaker frontend of Arm Ethos-U NPU driver
 
+config ETHOS_U_RENESAS
+	bool "Renesas RA Ethos-U NPU driver"
+	help
+	  Enables Renesas RA frontend of Arm Ethos-U NPU driver.
+
 endchoice
 
 config ETHOS_U_DCACHE

drivers/misc/ethos_u/ethos_u_renesas.c

@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/irq.h>
+#include <zephyr/init.h>
+#include <zephyr/device.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/logging/log.h>
+#include <ethosu_driver.h>
+#include <soc.h>
+
+#include "ethos_u_common.h"
+
+#define DT_DRV_COMPAT renesas_ra_npu
+LOG_MODULE_REGISTER(renesas_ra_npu, CONFIG_ETHOS_U_LOG_LEVEL);
+
+void ethos_u_renesas_ra_irq_handler(const struct device *dev)
+{
+	struct ethosu_data *data = dev->data;
+	struct ethosu_driver *drv = &data->drv;
+	IRQn_Type irq = R_FSP_CurrentIrqGet();
+
+	ethosu_irq_handler(drv);
+
+	R_BSP_IrqStatusClear(irq);
+}
+
+static int ethos_u_renesas_ra_init(const struct device *dev)
+{
+	const struct ethosu_dts_info *config = dev->config;
+	struct ethosu_data *data = dev->data;
+	struct ethosu_driver *drv = &data->drv;
+	struct ethosu_driver_version version;
+
+	LOG_DBG("Ethos-U DTS info. base_address=0x%p, secure_enable=%u, privilege_enable=%u",
+		config->base_addr, config->secure_enable, config->privilege_enable);
+
+	ethosu_get_driver_version(&version);
+
+	LOG_DBG("Version. major=%u, minor=%u, patch=%u", version.major, version.minor,
+		version.patch);
+
+	/* Turn on NPU power domain */
+	R_BSP_RegisterProtectDisable(BSP_REG_PROTECT_OM_LPC_BATT);
+	FSP_HARDWARE_REGISTER_WAIT(
+		(R_SYSTEM->PDCTRNPU & (R_SYSTEM_PDCTRGD_PDCSF_Msk | R_SYSTEM_PDCTRGD_PDPGSF_Msk)),
+		R_SYSTEM_PDCTRGD_PDPGSF_Msk);
+
+	R_SYSTEM->PDCTRNPU = 0;
+
+	FSP_HARDWARE_REGISTER_WAIT(
+		(R_SYSTEM->PDCTRNPU & (R_SYSTEM_PDCTRGD_PDCSF_Msk | R_SYSTEM_PDCTRGD_PDPGSF_Msk)),
+		0);
+	R_BSP_RegisterProtectEnable(BSP_REG_PROTECT_OM_LPC_BATT);
+
+	R_BSP_MODULE_START(FSP_IP_NPU, 0);
+
+	if (ethosu_init(drv, config->base_addr, NULL, 0, config->secure_enable,
+			config->privilege_enable)) {
+		LOG_ERR("Failed to initialize NPU with ethosu_init().");
+		return -EINVAL;
+	}
+
+	config->irq_config();
+
+	return 0;
+}
+
+#define ETHOSU_RENESAS_RA_DEVICE_INIT(idx)                                                         \
+	static struct ethosu_data ethosu_data_##idx;                                               \
+                                                                                                   \
+	static void ethosu_zephyr_irq_config_##idx(void)                                           \
+	{                                                                                          \
+		R_ICU->IELSR_b[DT_INST_IRQ_BY_NAME(idx, npu_irq, irq)].IELS =                      \
+			BSP_PRV_IELS_ENUM(CONCAT(EVENT_NPU_IRQ));                                  \
+                                                                                                   \
+		BSP_ASSIGN_EVENT_TO_CURRENT_CORE(BSP_PRV_IELS_ENUM(CONCAT(EVENT_NPU_IRQ)));        \
+                                                                                                   \
+		IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority),                         \
+			    ethos_u_renesas_ra_irq_handler, DEVICE_DT_INST_GET(idx), 0);           \
+                                                                                                   \
+		irq_enable(DT_INST_IRQN(idx));                                                     \
+	}                                                                                          \
+                                                                                                   \
+	static const struct ethosu_dts_info ethosu_dts_info_##idx = {                              \
+		.base_addr = (void *)DT_INST_REG_ADDR(idx),                                        \
+		.secure_enable = DT_INST_PROP(idx, secure_enable),                                 \
+		.privilege_enable = DT_INST_PROP(idx, privilege_enable),                           \
+		.irq_config = &ethosu_zephyr_irq_config_##idx,                                     \
+	};                                                                                         \
+                                                                                                   \
+	DEVICE_DT_INST_DEFINE(idx, ethos_u_renesas_ra_init, NULL, &ethosu_data_##idx,              \
+			      &ethosu_dts_info_##idx, POST_KERNEL,                                 \
+			      CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, NULL);
+
+DT_INST_FOREACH_STATUS_OKAY(ETHOSU_RENESAS_RA_DEVICE_INIT);

dts/arm/renesas/ra/ra8/r7ka8p1xf.dtsi

@@ -8,6 +8,16 @@
 #include <zephyr/dt-bindings/clock/ra_clock.h>
 
 / {
+	soc {
+		npu0: npu@40140000 {
+			compatible = "renesas,ra-npu";
+			reg = <0x40140000 0x1000>;
+			secure-enable;
+			privilege-enable;
+			status = "disabled";
+		};
+	};
+
 	clocks: clocks {
 		#address-cells = <1>;
 		#size-cells = <1>;

dts/bindings/arm/renesas,ra-npu.yaml

@@ -0,0 +1,14 @@
+# Copyright (c) 2025 Renesas Electronics Corporation
+# SPDX-License-Identifier: Apache-2.0
+
+description: Renesas RA frontend of Arm Ethos-U NPU driver
+
+compatible: "renesas,ra-npu"
+
+include: "arm,ethos-u.yaml"
+
+properties:
+  interrupt-names:
+    required: true
+    enum:
+      - "npu-irq"

samples/modules/tflite-micro/tflm_ethosu/Kconfig

@@ -9,7 +9,7 @@ config TAINT_BLOBS_TFLM
 config TAINT_BLOBS_TFLM_ETHOSU
 	bool "Choose Vela-compiled model targeting Ethos-U"
 	default y
-	depends on ETHOS_U_ARM || ETHOS_U_NUMAKER
+	depends on ETHOS_U_ARM || ETHOS_U_NUMAKER || ETHOS_U_RENESAS
 	select TAINT_BLOBS_TFLM
 
 source "Kconfig.zephyr"

samples/modules/tflite-micro/tflm_ethosu/boards/ek_ra8p1_r7ka8p1kflcac_cm33.overlay

@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&npu0 {
+	interrupts = <95 1>;
+	interrupt-names = "npu-irq";
+	status = "okay";
+};

samples/modules/tflite-micro/tflm_ethosu/boards/ek_ra8p1_r7ka8p1kflcac_cm85.overlay

@@ -0,0 +1,10 @@
+/*
+ * Copyright (c) 2025 Renesas Electronics Corporation
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&npu0 {
+	interrupts = <95 1>;
+	interrupt-names = "npu-irq";
+	status = "okay";
+};