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drivers: clock: stm32: Move the MSI init after the LSE init #97622
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Nitpicking: could you end the description sentence in the commit message body with a period .?
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| #if STM32_MSI_PLL_MODE | ||
| /* Check for LSE to be ready since its mandatory for MSI PLL mode */ | ||
| while (LL_RCC_LSE_IsReady() != 1) { |
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I guess this means STM32_LSE_ENABLED should be set. If so, a build error would be welcome (and in that case, this loop is already implemented above).
If some SoC support LSE not being enabled by Zephyr because handled from another core, when it makes sense to test it is enabled (and ready). But in that case, maybe need some kind of timeout here to not blindly wait endlessly here.
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I removed the loop and added a build error instead
Moved the MSI init after the LSE init to respect the initialization flow of the MSI PLL mode that need LSE to be enabled and ready. Signed-off-by: Julien Racki <[email protected]>
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Non-blocking:
| z_stm32_hsem_unlock(CFG_HW_RCC_SEMID); | ||
| } | ||
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| #if defined(STM32_MSI_ENABLED) |
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Nit: add a comment about MSI needing to come after LSE due to PLL



Moved the MSI init after the LSE init to respect the initialization flow of the MSI PLL mode that need LSE to be enabled and ready
see the RM0394 - STM32L41xxx/42xxx/43xxx/44xxx/45xxx/46xxx advanced Arm®-based 32-bit MCUs
Also added a check before enabling PLL Mode for MSI by making sure LSE is ready.
Fixes #96849