Skip to content

Conversation

@sylvioalves
Copy link
Contributor

Add hardware-accelerated crypto drivers for Espressif SoCs, enabling
SHA hashing and AES encryption/decryption operations.

SHA Driver Support:

  • Algorithms: SHA-224, SHA-256, SHA-384, SHA-512
  • ESP32: All algorithms (single-shot operations only)
  • ESP32-S2/S3: All algorithms (with multi-part support)
  • ESP32-C2/C3/C6/H2: SHA-224/256 only (with multi-part support)

AES Driver Support:

  • Modes: ECB, CBC, CTR
  • Key lengths: AES-128, AES-192, AES-256
  • ESP32: All modes and key sizes
  • ESP32-S2/S3: All modes, AES-128/256 only
  • ESP32-C2/C3/C6/H2: All modes, all key sizes

Also expands crypto test suite to validate SHA-224/256/384/512
algorithms with unified test vector framework.

@sylvioalves sylvioalves force-pushed the feature/espressif-crypto-driver branch from 7abb36a to fa84648 Compare October 21, 2025 11:35
@github-actions
Copy link

github-actions bot commented Oct 21, 2025

The following west manifest projects have changed revision in this Pull Request:

Name Old Revision New Revision Diff

All manifest checks OK

Note: This message is automatically posted and updated by the Manifest GitHub Action.

@github-actions github-actions bot added manifest manifest-hal_espressif DNM (manifest) This PR should not be merged (controlled by action-manifest) labels Oct 21, 2025
@zephyrbot zephyrbot added area: Tests Issues related to a particular existing or missing test area: Crypto / RNG area: Samples Samples area: Devicetree Bindings area: Xtensa Xtensa Architecture platform: ESP32 Espressif ESP32 area: Boards/SoCs area: RISCV RISCV Architecture (32-bit & 64-bit) labels Oct 21, 2025
@sylvioalves sylvioalves force-pushed the feature/espressif-crypto-driver branch from fa84648 to 9581d40 Compare October 21, 2025 11:39
@sylvioalves sylvioalves force-pushed the feature/espressif-crypto-driver branch 2 times, most recently from b3603cf to 27d3f53 Compare October 23, 2025 22:28
marekmatej
marekmatej previously approved these changes Oct 23, 2025
@sylvioalves sylvioalves added this to the v4.3.0 milestone Oct 24, 2025
Add into device tree SHA and AES peripherals.

Signed-off-by: Sylvio Alves <[email protected]>
marekmatej
marekmatej previously approved these changes Oct 24, 2025
Add hardware-accelerated SHA driver for Espressif SoCs supporting
SHA-224, SHA-256, SHA-384, and SHA-512 algorithms.

Supported SoCs:
- ESP32: SHA-224/256/384/512 (single-shot operations)
- ESP32-S2/S3: SHA-224/256/384/512 (with multi-part support)
- ESP32-C2/C3/C6/H2: SHA-224/256 (with multi-part support)

Tested with Zephyr crypto subsystem hash_compute() API.

Signed-off-by: Sylvio Alves <[email protected]>
Add hardware-accelerated AES driver for Espressif SoCs supporting
ECB, CBC, and CTR cipher modes with AES-128, AES-192, and AES-256
key lengths.

Supported modes:
- ECB (Electronic Codebook)
- CBC (Cipher Block Chaining)
- CTR (Counter)

Supported SoCs:
- ESP32: All modes, all key sizes
- ESP32-S2/S3: All modes, AES-128/256 only
- ESP32-C2/C3/C6/H2: All modes, all key sizes

Signed-off-by: Sylvio Alves <[email protected]>
Add support crypto tag into espressif boards.

Signed-off-by: Sylvio Alves <[email protected]>
Allow ESP32 SoCs to run AES sample.

Signed-off-by: Sylvio Alves <[email protected]>
Allow Espressif SoCs to be tested properly.

Signed-off-by: Sylvio Alves <[email protected]>
@sonarqubecloud
Copy link


switch (algo) {
case CRYPTO_HASH_ALGO_SHA224:
params->hal_mode = SHA2_256;
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

is that the right hal mode or it should be SHA2_224 ?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Hi, no, it must be SHA2_256. Espressif hardware doesn't have a separate SHA-224 engine. SHA-224 is implemented by running the SHA-256 hardware with a custom initialization vector (IV) and truncating the output to 224 bits. Shall I update the PR and add a proper comment in there?

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

BTW, it all works good with samples/driver/crypto and also with the improved tests added in here: #98099

Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Nope it is fine this way. I saw the comments about prefix IV and I thought that was the reason, but I checked the HAL and saw references to SHA224 and thought was better to confirm.

Copy link
Member

@ceolin ceolin left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

The code looks awesome, glad to see it on esp32 :)

@cfriedt cfriedt merged commit b487d53 into zephyrproject-rtos:main Oct 24, 2025
38 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

area: Boards/SoCs area: Crypto / RNG area: Devicetree Bindings area: RISCV RISCV Architecture (32-bit & 64-bit) area: Samples Samples area: Tests Issues related to a particular existing or missing test area: Xtensa Xtensa Architecture platform: ESP32 Espressif ESP32

Projects

None yet

Development

Successfully merging this pull request may close these issues.

9 participants