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soc: silabs: siwx91x: Improve performance #98060

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drivers: wifi: siwx91x: To improve SiWx91x performance
ragurram26 Oct 22, 2025
26af633
soc: silabs: siwg917: Added 120Mhz soc clock features via DTS
ragurram26 Nov 12, 2025
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3 changes: 2 additions & 1 deletion dts/arm/silabs/siwg917.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -64,7 +64,7 @@
* Less memory is allocated to Zephyr, more memory is allocated
* to NWP, better are the WiFi and BLE performances.
*/
reg = <0x00000400 DT_SIZE_K(255)>;
reg = <0x00000400 DT_SIZE_K(319)>;
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@Martinhoff-maker Martinhoff-maker Nov 4, 2025

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If I understand right, you give less memory to NWP and you got better perf ?

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@jerome-pouiller jerome-pouiller Nov 5, 2025

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The original values has been computed to offload socket/TCP/IP to the NWP. However, since the Zephyr is taking care about these layers, the NWP is less solicited than initially expected. So, it makes sense to allocate more memory to the M4. Probably the user would want to allocate more memory to the NWP if he enables CONFIG_WIFI_SILABS_SIWX91X_NET_STACK_OFFLOAD.

@ragurram26, maye the sentence "Less memory is allocated to Zephyr, more memory is allocated to NWP, better are the WiFi and BLE performances." is not accurate anymore?

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@jerome-pouiller jerome-pouiller Nov 24, 2025

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@ragurram26 don't you believe the comment should be updated?

};

sram_dma1: memory-dma@24061c00 {
Expand All @@ -81,6 +81,7 @@
interrupt-parent = <&nvic>;
interrupts = <30 0>, <74 0>;
interrupt-names = "nwp_stack", "nwp_irq";
silabs-nwp-120mhz-clock-frequency;
status = "okay";

bt_hci0: bt_hci {
Expand Down
8 changes: 8 additions & 0 deletions dts/bindings/net/wireless/silabs,siwx91x-nwp.yaml
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Expand Up @@ -31,3 +31,11 @@ properties:
- deep-sleep-without-ram-retention
- deep-sleep-with-ram-retention
required: true

silabs-nwp-120mhz-clock-frequency:
type: boolean
description: |
Enable the 120 MHz SoC clock configuration for SiWx91x devices.
Running the clock at 120 MHz can enhance throughput and support
demanding performance requirements. While recommended for high-
throughput use cases, it is not required for standard operation.
15 changes: 14 additions & 1 deletion soc/silabs/silabs_siwx91x/siwg917/siwx91x_nwp.c
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Expand Up @@ -43,6 +43,7 @@ struct siwx91x_nwp_config {
void (*config_irq)(const struct device *dev);
uint32_t stack_size;
uint8_t power_profile;
bool silabs_nwp_120mhz_clock_frequency;
};

typedef struct {
Expand Down Expand Up @@ -311,6 +312,7 @@ static int siwx91x_get_nwp_config(const struct device *dev,
sl_wifi_device_configuration_t *get_config,
uint8_t wifi_oper_mode, bool hidden_ssid, uint8_t max_num_sta)
{
const struct siwx91x_nwp_config *config = dev->config;
sl_wifi_device_configuration_t default_config = {
.region_code = siwx91x_map_country_code_to_region(DEFAULT_COUNTRY_CODE),
.band = SL_SI91X_WIFI_BAND_2_4GHZ,
Expand All @@ -330,6 +332,11 @@ static int siwx91x_get_nwp_config(const struct device *dev,
SL_SI91X_EXT_FEAT_FRONT_END_SWITCH_PINS_ULP_GPIO_4_5_0 |
SL_SI91X_EXT_FEAT_FRONT_END_INTERNAL_SWITCH |
SL_SI91X_EXT_FEAT_XTAL_CLK,
},
.ta_pool = {
.tx_ratio_in_buffer_pool = 1,
.rx_ratio_in_buffer_pool = 1,
.global_ratio_in_buffer_pool = 1
}
};

Expand All @@ -347,6 +354,10 @@ static int siwx91x_get_nwp_config(const struct device *dev,
siwx91x_store_country_code(dev, DEFAULT_COUNTRY_CODE);
siwx91x_apply_sram_config(boot_config);

/* Apply TA clock configuration based on DT property */
if (config->silabs_nwp_120mhz_clock_frequency) {
boot_config->custom_feature_bit_map |= SL_SI91X_CUSTOM_FEAT_SOC_CLK_CONFIG_120MHZ;
}
switch (wifi_oper_mode) {
case WIFI_STA_MODE:
siwx91x_configure_sta_mode(boot_config);
Expand Down Expand Up @@ -467,7 +478,9 @@ BUILD_ASSERT(CONFIG_SIWX91X_NWP_INIT_PRIORITY < CONFIG_KERNEL_INIT_PRIORITY_DEFA
static const struct siwx91x_nwp_config siwx91x_nwp_config_##inst = { \
.config_irq = silabs_siwx91x_nwp_irq_configure_##inst, \
.power_profile = DT_ENUM_IDX(DT_DRV_INST(inst), power_profile), \
.stack_size = DT_INST_PROP(inst, stack_size) \
.stack_size = DT_INST_PROP(inst, stack_size), \
.silabs_nwp_120mhz_clock_frequency = \
DT_INST_PROP(inst, silabs_nwp_120mhz_clock_frequency) \
}; \
\
/* Coprocessor uses value stored in IVT to store its stack. We can't use Z_ISR_DECLARE() */\
Expand Down