Merge pull request #25493 from alexrp/std-debug-mips-ppc

`std.debug`: MIPS and PowerPC unwind support + some other stuff

Author: alexrp

lib/std/debug.zig

@@ -623,7 +623,7 @@ pub const StackUnwindOptions = struct {
 /// the given buffer, so `addr_buf` must have a lifetime at least equal to the `StackTrace`.
 ///
 /// See `writeCurrentStackTrace` to immediately print the trace instead of capturing it.
-pub fn captureCurrentStackTrace(options: StackUnwindOptions, addr_buf: []usize) std.builtin.StackTrace {
+pub noinline fn captureCurrentStackTrace(options: StackUnwindOptions, addr_buf: []usize) std.builtin.StackTrace {
     const empty_trace: std.builtin.StackTrace = .{ .index = 0, .instruction_addresses = &.{} };
     if (!std.options.allow_stack_tracing) return empty_trace;
     var it = StackIterator.init(options.context) catch return empty_trace;
@@ -661,7 +661,7 @@ pub fn captureCurrentStackTrace(options: StackUnwindOptions, addr_buf: []usize)
 /// Write the current stack trace to `writer`, annotated with source locations.
 ///
 /// See `captureCurrentStackTrace` to capture the trace addresses into a buffer instead of printing.
-pub fn writeCurrentStackTrace(options: StackUnwindOptions, writer: *Writer, tty_config: tty.Config) Writer.Error!void {
+pub noinline fn writeCurrentStackTrace(options: StackUnwindOptions, writer: *Writer, tty_config: tty.Config) Writer.Error!void {
     if (!std.options.allow_stack_tracing) {
         tty_config.setColor(writer, .dim) catch {};
         try writer.print("Cannot print stack trace: stack tracing is disabled\n", .{});

lib/std/debug/Dwarf.zig

@@ -1432,8 +1432,10 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
         .aarch64, .aarch64_be => 32,
         .arm, .armeb, .thumb, .thumbeb => 15,
         .hexagon => 76,
-        .loongarch32, .loongarch64 => 32,
-        .riscv32, .riscv32be, .riscv64, .riscv64be => 32,
+        .loongarch32, .loongarch64 => 64,
+        .mips, .mipsel, .mips64, .mips64el => 66,
+        .powerpc, .powerpcle, .powerpc64, .powerpc64le => 67,
+        .riscv32, .riscv32be, .riscv64, .riscv64be => 65,
         .s390x => 65,
         .x86 => 8,
         .x86_64 => 16,
@@ -1447,6 +1449,8 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
         .arm, .armeb, .thumb, .thumbeb => 11,
         .hexagon => 30,
         .loongarch32, .loongarch64 => 22,
+        .mips, .mipsel, .mips64, .mips64el => 30,
+        .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,
         .riscv32, .riscv32be, .riscv64, .riscv64be => 8,
         .s390x => 11,
         .x86 => 5,
@@ -1461,6 +1465,8 @@ pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {
         .arm, .armeb, .thumb, .thumbeb => 13,
         .hexagon => 29,
         .loongarch32, .loongarch64 => 3,
+        .mips, .mipsel, .mips64, .mips64el => 29,
+        .powerpc, .powerpcle, .powerpc64, .powerpc64le => 1,
         .riscv32, .riscv32be, .riscv64, .riscv64be => 2,
         .s390x => 15,
         .x86 => 4,

lib/std/debug/Dwarf/SelfUnwinder.zig

@@ -229,8 +229,10 @@ fn nextInner(unwinder: *SelfUnwinder, gpa: Allocator, cache_entry: *const CacheE
         } = switch (rule) {
             .default => val: {
                 // The default rule is typically equivalent to `.undefined`, but ABIs may override it.
-                if (builtin.cpu.arch.isAARCH64() and register >= 19 and register <= 28) {
-                    break :val .same;
+                switch (builtin.target.cpu.arch) {
+                    .aarch64, .aarch64_be => if (register >= 19 and register <= 28) break :val .same,
+                    .s390x => if (register >= 6 and register <= 15) break :val .same,
+                    else => {},
                 }
                 break :val .undefined;
             },

lib/std/debug/Dwarf/expression.zig

@@ -1160,22 +1160,19 @@ test "basics" {
 
         mem.writeInt(usize, reg_bytes[0..@sizeOf(usize)], 0xee, native_endian);
         (try regNative(&cpu_context, fp_reg_num)).* = 1;
-        (try regNative(&cpu_context, sp_reg_num)).* = 2;
-        (try regNative(&cpu_context, ip_reg_num)).* = 3;
+        (try regNative(&cpu_context, ip_reg_num)).* = 2;
 
         try b.writeBreg(writer, fp_reg_num, @as(usize, 100));
-        try b.writeBreg(writer, sp_reg_num, @as(usize, 200));
-        try b.writeBregx(writer, ip_reg_num, @as(usize, 300));
-        try b.writeRegvalType(writer, @as(u8, 0), @as(usize, 400));
+        try b.writeBregx(writer, ip_reg_num, @as(usize, 200));
+        try b.writeRegvalType(writer, @as(u8, 0), @as(usize, 300));
 
         _ = try stack_machine.run(program.written(), allocator, context, 0);
 
         const regval_type = stack_machine.stack.pop().?.regval_type;
-        try testing.expectEqual(@as(usize, 400), regval_type.type_offset);
+        try testing.expectEqual(@as(usize, 300), regval_type.type_offset);
         try testing.expectEqual(@as(u8, @sizeOf(usize)), regval_type.type_size);
         try testing.expectEqual(@as(usize, 0xee), regval_type.value);
 
-        try testing.expectEqual(@as(usize, 303), stack_machine.stack.pop().?.generic);
         try testing.expectEqual(@as(usize, 202), stack_machine.stack.pop().?.generic);
         try testing.expectEqual(@as(usize, 101), stack_machine.stack.pop().?.generic);
     }

lib/std/debug/SelfInfo/Elf.zig

@@ -99,6 +99,14 @@ pub const can_unwind: bool = s: {
             .aarch64_be,
             .hexagon,
             .loongarch64,
+            .mips,
+            .mipsel,
+            .mips64,
+            .mips64el,
+            .powerpc,
+            .powerpcle,
+            .powerpc64,
+            .powerpc64le,
             .riscv32,
             .riscv64,
             .s390x,