tests: PCIe reference TX tool + robust submit-to-air transport-floor extraction

[josephnef]

Reference tooling for the transport-latency comparison — the PCIe half of the submit-to-air measurement, plus the analysis fix that makes it trustworthy on a real (busy) channel. Both live in tests/ and are not in the CMake build, so library CI is unaffected.

tests/pcie_txegress_tx.cpp — PCIe reference TX

A host-pushed data-frame TX over the PCIe transport: opens the 8821CE via PcieTransport/vfio, disables EDCCA (SetCcaMode, so the residual reflects the transport + MAC-pipeline floor, not channel load), and loops ReadTsf → build_frame (tdma tag) → send_packet, embedding the submit stamp in each frame. Paired with the existing txegress_witness on a co-located receiver, it measures submit-to-air jitter over PCIe. Mirrors the USB timesync software master, so the numbers are directly comparable. Built standalone (g++ against a DEVOURER_PCIE=ON libdevourer.a). The reference TX tool for the SDIO-vs-USB benchmark (#235).

tests/txegress_analyze.py — robust transport-floor extraction

Adds an outlier-rejecting fit alongside the raw one. On a busy channel the MAC still defers even with EDCCA off, injecting ms-scale outliers that wreck the plain least-squares (the slope goes to an implausible ppm). Iterative 3·MAD rejection recovers the tight cluster of frames that aired immediately — the transport + MAC-pipeline floor. It now reports both raw and floor per stamp, with the crystal ppm as a sanity check.

Measured (on-air, this bench)

Transport	submit-to-air floor (RMS)	p2p	crystal
USB (8812AU)	~93 µs	554 µs	−1.2 ppm
PCIe (8821CE)	~12 µs	63 µs	−1.6 ppm

PCIe is ~8× tighter — the USB floor is dominated by the USB submit-path jitter (reglat ~68 µs / ±64 µs); PCIe removes it, leaving the MAC TX pipeline (~12 µs). The fundamental TX-egress wall (per-frame air-departure control) is unchanged — see #236.

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