@@ -2041,10 +2041,19 @@ export class PseudoFWC {
20412041 const leftCompressedHardwireLgciu2 =
20422042 this . dc2BusPowered . get ( ) && SimVar . GetSimVarValue ( 'L:A32NX_LGCIU_2_LEFT_GEAR_COMPRESSED' , 'bool' ) > 0 ;
20432043
2044- const lgciu1Or2DiscreteWord1Invalid = this . lgciu1DiscreteWord1 . isInvalid ( ) || this . lgciu2DiscreteWord1 . isInvalid ( ) ;
2045- const lgciu1Or2DiscreteWord2Invalid = this . lgciu1DiscreteWord2 . isInvalid ( ) || this . lgciu2DiscreteWord2 . isInvalid ( ) ;
2046- const lgciu1Or2DiscreteWord3Invalid = this . lgciu1DiscreteWord3 . isInvalid ( ) || this . lgciu2DiscreteWord3 . isInvalid ( ) ;
2047- const lgciu1Or2DiscreteWord4Invalid = this . lgciu1DiscreteWord4 . isInvalid ( ) || this . lgciu2DiscreteWord4 . isInvalid ( ) ;
2044+ const lgciu1DiscreteWord1Invalid = this . lgciu1DiscreteWord1 . isInvalid ( ) ;
2045+ const lgciu2DiscreteWord1Invalid = this . lgciu2DiscreteWord1 . isInvalid ( ) ;
2046+
2047+ const lgciu1DiscreteWord2Invalid = this . lgciu1DiscreteWord2 . isInvalid ( ) ;
2048+ const lgciu2DiscreteWord2Invalid = this . lgciu2DiscreteWord2 . isInvalid ( ) ;
2049+
2050+ const lgciu1DiscreteWord3Invalid = this . lgciu1DiscreteWord3 . isInvalid ( ) ;
2051+ const lgciu2DiscreteWord3Invalid = this . lgciu2DiscreteWord3 . isInvalid ( ) ;
2052+
2053+ const lgciu1DiscreteWord4Invalid = this . lgciu1DiscreteWord4 . isInvalid ( ) ;
2054+ const lgciu2DiscreteWord4Invalid = this . lgciu2DiscreteWord4 . isInvalid ( ) ;
2055+
2056+ const lgciu1Or2DiscreteWord1Invalid = lgciu1DiscreteWord1Invalid || lgciu2DiscreteWord1Invalid ;
20482057
20492058 const lgciu1LhGearDownlock = this . lgciu1DiscreteWord1 . bitValueOr ( 23 , false ) ;
20502059 const lgciu2LhGearDownlock = this . lgciu2DiscreteWord1 . bitValueOr ( 23 , false ) ;
@@ -3183,18 +3192,18 @@ export class PseudoFWC {
31833192 this . lgciu1Fault . set (
31843193 this . lgciu1DiscreteWord4 . bitValueOr ( 29 , false ) ||
31853194 this . lgciu1DiscreteWord2 . bitValueOr ( 29 , false ) ||
3186- ( lgciu1Or2DiscreteWord1Invalid &&
3187- lgciu1Or2DiscreteWord2Invalid &&
3188- lgciu1Or2DiscreteWord3Invalid &&
3189- lgciu1Or2DiscreteWord4Invalid ) ,
3195+ ( lgciu1DiscreteWord1Invalid &&
3196+ lgciu1DiscreteWord2Invalid &&
3197+ lgciu1DiscreteWord3Invalid &&
3198+ lgciu1DiscreteWord4Invalid ) ,
31903199 ) ;
31913200 this . lgciu2Fault . set (
31923201 this . lgciu2DiscreteWord4 . bitValueOr ( 29 , false ) ||
31933202 this . lgciu2DiscreteWord2 . bitValueOr ( 29 , false ) ||
3194- ( lgciu1Or2DiscreteWord1Invalid &&
3195- lgciu1Or2DiscreteWord2Invalid &&
3196- lgciu1Or2DiscreteWord3Invalid &&
3197- lgciu1Or2DiscreteWord4Invalid ) ,
3203+ ( lgciu2DiscreteWord1Invalid &&
3204+ lgciu2DiscreteWord2Invalid &&
3205+ lgciu2DiscreteWord3Invalid &&
3206+ lgciu2DiscreteWord4Invalid ) ,
31983207 ) ;
31993208 this . lgciu12Fault . set ( this . lgciu1Fault . get ( ) && this . lgciu2Fault . get ( ) ) ;
32003209
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