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7 changes: 7 additions & 0 deletions tests/variable_assignment/rule_004_test_input.fixed.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -82,4 +82,11 @@ begin
);
end process PROC_2;

-- Check that conditional assignments are ignored.
PROC_3 : process is
begin
a := 0 when b = '0' or
a = '1' else 10;
end process PROC_3;

end architecture ARCH;
7 changes: 7 additions & 0 deletions tests/variable_assignment/rule_004_test_input.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -82,4 +82,11 @@ begin
);
end process PROC_2;

-- Check that conditional assignments are ignored.
PROC_3 : process is
begin
a := 0 when b = '0' or
a = '1' else 10;
end process PROC_3;

end architecture ARCH;
1 change: 0 additions & 1 deletion vsg/rules/variable_assignment/rule_004.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,6 @@

lTokenPairs = []
lTokenPairs.append([token.simple_variable_assignment.assignment, token.simple_variable_assignment.semicolon])
lTokenPairs.append([token.conditional_variable_assignment.assignment, token.conditional_variable_assignment.semicolon])


class rule_004(multiline_alignment_between_tokens):
Expand Down
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