[pull] main from mdn:main#893
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pull[bot] merged 8 commits intoryrodriguez25:mainfrom Apr 13, 2026
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* updateddescription of transfer paramater * Minor fixes --------- Co-authored-by: Joshua Chen <sidachen2003@gmail.com>
…r <html> (#43670) Co-authored-by: Chris Mills <chrisdavidmills@gmail.com>
* fixed gamepad docs * modified changes * Update files/en-us/web/api/gamepad_api/using_the_gamepad_api/index.md Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com> --------- Co-authored-by: github-actions[bot] <41898282+github-actions[bot]@users.noreply.github.com>
* Document Wasm SIMD arithmetic instructions * Add more SIMD information to numeric values * Arithmetic instruction progress * More bitwise/arithmetic progress * Add v128 logic instructions * correct arithmetic casin * Fix i32/i64 type prefix in integer comparison binary examples ge_s, ge_u, gt_s, gt_u, le_s, le_u, lt_s, lt_u all showed f32/f64 prefixes in the example column (e.g. `f32.ge_s`) which don't exist. * Fix i8x16.shr_s and i8x16.shr_u binary encoding examples 108 and 109 are both < 128 so they encode as single LEB128 bytes. The examples incorrectly showed a trailing 0x01 byte. * Fix 00x0 typo in load64_lane binary encoding example * Fix div binary encoding examples f32.div and f64.div showed 0x92/0xa0 (the add opcodes). f64x2.div showed 0xf0 0x01 (f64x2.add). Correct values are 0x95, 0xa3, and 0xf3 0x01 respectively. * Fix const binary encoding examples i32.const and i64.const had spurious extra bytes; 2 and 1 are single LEB128 bytes so no extra byte is needed. f32.const 2.5 had an extra trailing 0x40 byte; 2.5 in f32 little-endian is 4 bytes. Also align the SIMD description example to use i32x4 consistently with the binary table. * Fix shr_s example description: i8x16 -> i16x8 The Wasm code uses i16x8 but the prose described it as i8x16. * Fix shr_u example: i8x16 -> i16x8, extract_lane_s -> extract_lane_u The prose described the lane type as i8x16 but the code uses i16x8. Also switched to extract_lane_u since the page demonstrates unsigned shift-right. * Fix ceil/floor SIMD example type: i32x4 -> f32x4 ceil and floor only apply to f32x4 and f64x2. Using i32x4 with float literal values was incorrect. * Fix bitmask description to be accurate for all lane types The original described it as operating on "each byte" and "bit 7", which is only accurate for i8x16. Updated to say "each lane" and clarified the threshold values for wider types in the note. * Fix all_true description: "all bits" -> "all lanes" The spec defines ixN.all_true as checking that each lane is non-zero, not each bit. A lane value of 1 passes (non-zero lane) even though most bits within it are 0. * Fix gt_u link in numeric index pointing to gt_s * Remove placeholder (#) links for add_sat_s/add_sat_u Those pages don't exist yet; plain text avoids publishing dead links. * Remove empty links for now * Add explanations of what the output SIMD values contain. * More fixes from Hamish review --------- Co-authored-by: Ryan Hunt <rhunt@eqrion.net>
Remove mentions of AppCache A while ago MDN removed majority of documentation about obsolete AppCache, but left behind two menions in Apache config guide. This commit cleans them up.
Removed the 'getHostEnvironmentValue' function entry from the API documentation.
…Url (#43735) * Document RTCIdentityAssertion idp/name and RTCPeerConnection.idpLoginUrl * Apply suggestions from code review Co-authored-by: Chris Mills <chrisdavidmills@gmail.com> --------- Co-authored-by: Chris Mills <chrisdavidmills@gmail.com>
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