Add floating point matrix multiply-accumulate widening intrinsics #418
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Adds intrinsic support for the FMMLA matrix multiply-add widening instructions introduced by the 2024 dpISA. FEAT_F8F32MM: Neon/SVE2 FP8 to single-precision FEAT_F8F16MM: Neon/SVE2 FP8 to half-precision FEAT_SVE_F16F32MM: SVE half-precision to single-precision
Lukacma
reviewed
Oct 15, 2025
Add fpm source parameter Change destination and first source parameter type: float16x4 -> float16x8
Contributor
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LGTM :^) |
| float32x4_t vmlallttq_laneq_f32_mf8_fpm(float32x4_t vd, mfloat8x16_t vn, mfloat8x16_t vm, __builtin_constant_p(lane), fpm_t fpm) vd -> Vd.4S;vm -> Vn.16B; vm -> Vm.B; 0 <= lane <= 15 FMLALLBB Vd.4S, Vn.16B, Vm.B[lane] Vd.4S -> result A64 | ||
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| <SECTION> Matrix multiplication intrinsics from Armv9.6-A | ||
| float16x8_t vmmlaq_f16_mf8(float16x8_t r, mfloat8x16_t a, mfloat8x16_t b, fpm_t fpm) r -> Vd.4H;a -> Vn.16B;b -> Vm.16B FMMLA Vd.4H, Vn.16B, Vm.16B Vd.4H -> result A64 |
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@jthackray following on from
#409 (comment)
That was merged early accidentally, then reverted.
This is the genuine PR and this issue seems to have been fixed.
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It is missing _fpm suffix here though. No matter how many times we look at it we always miss smth in the ACLE :(.
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Ahh yeah agreed :(
@amilendra are you able to make a fix? I am happy to if youre busy
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Feel free to fix it. Thanks
Lukacma
reviewed
Oct 29, 2025
| float32x4_t vmlallttq_laneq_f32_mf8_fpm(float32x4_t vd, mfloat8x16_t vn, mfloat8x16_t vm, __builtin_constant_p(lane), fpm_t fpm) vd -> Vd.4S;vm -> Vn.16B; vm -> Vm.B; 0 <= lane <= 15 FMLALLBB Vd.4S, Vn.16B, Vm.B[lane] Vd.4S -> result A64 | ||
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| <SECTION> Matrix multiplication intrinsics from Armv9.6-A | ||
| float16x8_t vmmlaq_f16_mf8(float16x8_t r, mfloat8x16_t a, mfloat8x16_t b, fpm_t fpm) r -> Vd.4H;a -> Vn.16B;b -> Vm.16B FMMLA Vd.4H, Vn.16B, Vm.16B Vd.4H -> result A64 |
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Suggested change
| float16x8_t vmmlaq_f16_mf8(float16x8_t r, mfloat8x16_t a, mfloat8x16_t b, fpm_t fpm) r -> Vd.4H;a -> Vn.16B;b -> Vm.16B FMMLA Vd.4H, Vn.16B, Vm.16B Vd.4H -> result A64 | |
| float16x8_t vmmlaq_f16_mf8(float16x8_t r, mfloat8x16_t a, mfloat8x16_t b, fpm_t fpm) r -> Vd.8H;a -> Vn.16B;b -> Vm.16B FMMLA Vd.8H, Vn.16B, Vm.16B Vd.4H -> result A64 |
Also this
Contributor
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See #420 for the fix |
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Adds intrinsic support for the FMMLA matrix multiply-add widening instructions introduced by the 2024 dpISA.
FEAT_F8F32MM: Neon/SVE2 FP8 to single-precision
FEAT_F8F16MM: Neon/SVE2 FP8 to half-precision
FEAT_SVE_F16F32MM: SVE half-precision to single-precision
Relands PR #409 that was approved, mistakenly merged and subsequently reverted.
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