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boards: ambiq: apollo4p_blue_kbr_evb add new board #67

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6 changes: 6 additions & 0 deletions boards/ambiq/apollo4p_blue_kbr_evb/Kconfig.apollo4p_blue_kbr_evb
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# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2025 Ambiq Micro Inc. <www.ambiq.com>

config BOARD_APOLLO4P_BLUE_KBR_EVB
select SOC_APOLLO4P_BLUE
45 changes: 45 additions & 0 deletions boards/ambiq/apollo4p_blue_kbr_evb/Kconfig.defconfig
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# SPDX-License-Identifier: Apache-2.0
#
# Copyright (c) 2025-2025 Ambiq Micro Inc. <www.ambiq.com>

if BOARD_APOLLO4P_BLUE_KBR_EVB

config SYS_CLOCK_HW_CYCLES_PER_SEC
default 32768 if AMBIQ_STIMER_TIMER
default 96000000 if CORTEX_M_SYSTICK

config LOG_BACKEND_SWO_FREQ_HZ
default 1000000
depends on LOG_BACKEND_SWO

if BT

config MAIN_STACK_SIZE
default 2048

config BT_BUF_ACL_TX_COUNT
default 14

config BT_BUF_EVT_RX_COUNT
default 15

config BT_BUF_CMD_TX_SIZE
default $(UINT8_MAX)

config BT_BUF_EVT_RX_SIZE
default $(UINT8_MAX)

config BT_BUF_ACL_TX_SIZE
default 251

config BT_BUF_ACL_RX_SIZE
default 251

# L2CAP SDU/PDU TX MTU
# BT_L2CAP_RX_MTU = CONFIG_BT_BUF_ACL_RX_SIZE - BT_L2CAP_HDR_SIZE
config BT_L2CAP_TX_MTU
default 247

endif # BT

endif # BOARD_APOLLO4P_BLUE_KBR_EVB
174 changes: 174 additions & 0 deletions boards/ambiq/apollo4p_blue_kbr_evb/apollo4p_blue_kbr_evb-pinctrl.dtsi
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/*
* Copyright (c) 2025 Ambiq Micro Inc. <www.ambiq.com>
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <dt-bindings/pinctrl/ambiq-apollo4-pinctrl.h>
#include "apollo4p_blue_kbr_evb_connector.dtsi"

&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0TX_P60>;
};
group2 {
pinmux = <UART0RX_P47>;
input-enable;
};
};
itm_default: itm_default {
group1 {
pinmux = <SWO_P28>;
};
};
i2c0_default: i2c0_default {
group1 {
pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c1_default: i2c1_default {
group1 {
pinmux = <M1SCL_P8>, <M1SDAWIR3_P9>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c2_default: i2c2_default {
group1 {
pinmux = <M2SCL_P25>, <M2SDAWIR3_P26>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c3_default: i2c3_default {
group1 {
pinmux = <M3SCL_P31>, <M3SDAWIR3_P32>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c5_default: i2c5_default {
group1 {
pinmux = <M5SCL_P47>, <M5SDAWIR3_P48>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c6_default: i2c6_default {
group1 {
pinmux = <M6SCL_P61>, <M6SDAWIR3_P62>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};
i2c7_default: i2c7_default {
group1 {
pinmux = <M7SCL_P22>, <M7SDAWIR3_P23>;
drive-open-drain;
drive-strength = "0.5";
bias-pull-up;
};
};

spi0_default: spi0_default {
group1 {
pinmux = <M0SCK_P5>, <M0MISO_P7>, <M0MOSI_P6>;
};
};
spi1_default: spi1_default {
group1 {
pinmux = <M1SCK_P8>, <M1MISO_P10>, <M1MOSI_P9>;
};
};
spi2_default: spi2_default {
group1 {
pinmux = <M2SCK_P25>, <M2MISO_P27>, <M2MOSI_P26>;
};
};
spi3_default: spi3_default {
group1 {
pinmux = <M3SCK_P31>, <M3MISO_P33>, <M3MOSI_P32>;
};
};
spi4_default: spi4_default {
group1 {
pinmux = <M4SCK_P34>, <M4MISO_P36>, <M4MOSI_P35>;
};
};
spi5_default: spi5_default {
group1 {
pinmux = <M5SCK_P47>, <M5MISO_P49>, <M5MOSI_P48>;
};
};
spi6_default: spi6_default {
group1 {
pinmux = <M6SCK_P61>, <M6MISO_P63>, <M6MOSI_P62>;
};
};
spi7_default: spi7_default {
group1 {
pinmux = <M7SCK_P22>, <M7MISO_P24>, <M7MOSI_P23>;
};
};
mspi0_default: mspi0_default{
group1 {
pinmux = <MSPI0_0_P64>,
<MSPI0_1_P65>,
<MSPI0_8_P72>;
};
group2 {
pinmux = <NCE1_P1>;
drive-push-pull;
drive-strength = "0.5";
ambiq,nce-src = <0>;
};
};
mspi2_default: mspi2_default{
group1 {
pinmux = <MSPI2_0_P74>,
<MSPI2_1_P75>,
<MSPI2_8_P82>;
};
group2 {
pinmux = <NCE0_P0>;
drive-push-pull;
drive-strength = "0.5";
ambiq,nce-src = <32>;
};
};

xo32m_default: xo32m_default {
group1 {
pinmux = <CLKOUT_32M_P73>;
drive-strength = "0.1";
};
};
xo32k_default: xo32k_default {
group1 {
pinmux = <XT32KHZ_P45>;
drive-strength = "0.1";
};
};
adc0_default: adc0_default{
group1 {
pinmux = <ADCSE4_P15>, <ADCSE7_P12>;
drive-strength = "0.1";
};
};
pwm2_default: pwm2_default{
group1 {
pinmux = <CT91_P91>;
drive-open-drain;
drive-strength = "0.5";
};
};
};
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