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30 | 30 | # flags of 1 means DMA-capable (DMA and BDMA) |
31 | 31 | # flags of 2 means faster memory for CPU intensive work |
32 | 32 | # flags of 4 means memory can be used for SDMMC DMA |
| 33 | + # flags of 8 means memory can be used for ethernet DMA |
33 | 34 | 'RAM_MAP' : [ |
34 | | - (0x30000000, 256, 0), # SRAM1, SRAM2 |
| 35 | + (0x30000000, 256, 8), # SRAM1, SRAM2 |
35 | 36 | (0x20000000, 128, 2), # DTCM, tightly coupled, no DMA, fast |
36 | 37 | (0x24000000, 512, 4), # AXI SRAM. Use this for SDMMC IDMA ops |
37 | 38 | (0x00000400, 63, 2), # ITCM (first 1k removed, to keep address 0 unused) |
38 | | - (0x30040000, 32, 0), # SRAM3. |
| 39 | + (0x30040000, 32, 8), # SRAM3. |
39 | 40 | (0x38000000, 64, 1), # SRAM4. |
40 | 41 | ], |
41 | 42 | 'INSTRUCTION_RAM' : (0x00000400, 63), # ITCM (first 1k removed, to keep address 0 unused) |
42 | | - 'FLASH_RAM' : (0x24020000, 384), # AXI SRAM used for process stack and ram functions |
| 43 | + 'FLASH_RAM' : (0x24020000, 384), # AXI SRAM used for process stack and ram functions |
43 | 44 | 'DATA_RAM' : (0x20010000, 64), # DTCM, tightly coupled, no DMA, fast |
44 | 45 |
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45 | | - # avoid a problem in the bootloader by making DTCM first. The DCache init |
| 46 | + # avoid a problem in the bootloader by making DTCM first. The DCache init |
46 | 47 | # when using SRAM1 as primary memory gets a hard fault in bootloader |
47 | 48 | # we can't use DTCM first for main firmware as some builds overflow the first segment |
48 | 49 | 'RAM_MAP_BOOTLOADER' : [ |
49 | 50 | (0x20000000, 128, 2), # DTCM, tightly coupled, no DMA, fast |
50 | | - (0x30000000, 256, 0), # SRAM1, SRAM2 |
| 51 | + (0x30000000, 256, 8), # SRAM1, SRAM2 |
51 | 52 | (0x24000000, 512, 4), # AXI SRAM. Use this for SDMMC IDMA ops |
52 | 53 | (0x00000400, 63, 2), # ITCM (first 1k removed, to keep address 0 unused) |
53 | | - (0x30040000, 32, 0), # SRAM3. |
| 54 | + (0x30040000, 32, 8), # SRAM3. |
54 | 55 | (0x38000000, 64, 1), # SRAM4. |
55 | 56 | ], |
56 | 57 |
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