Intel Stratix 10 SOCFPGA Board Support Package


1. About this document
======================

This document describes common and non-hardware specific information.
Please refer to README.hardware for hardware specific information.

Dependencies
------------
This layer depends on the oe-core version supplied with Wind River Linux
and the wrlinux layer.


Maintenance
-----------
This layer is maintained by Wind River Systems, Inc.
Contact <support@windriver.com> or your support representative for more
information on submitting changes.


License
-------
Copyright (C) 2018 Wind River Systems, Inc.

Source code included in the tree for individual recipes is under the LICENSE
stated in the associated recipe (.bb file) unless otherwise stated.

The metadata is under the following license unless otherwise stated.

Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:

The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.

2. BSP Kernel and Distros
=========================

The following table summarizes the valid Wind River Linux distros for this BSP.
'Y' in each content cell stands for supported; 'N' stands for not supported:

  +--------------+-------------+-------------+-------------+
  | valid/distro |   wrlinux   | wrlinux-cgl | wrlinux-ovp |
  +--------------+-------------+-------------+-------------+
  |    valid     |      Y      |      N      |      N      |
  +--------------+-------------+-------------+-------------+

For the supported kernel type for this BSP, please check the TARGET_SUPPORTED_KTYPES
by running 'bitbake -e virtual/kernel | grep "^TARGET_SUPPORTED_KTYPES="'.

Note: The preempt-rt ktype is not available for this BSP/Machine at this time.


3. Board Specific Patches
=========================

To get a list of patches applied to the kernel specific to this BSP,
along with patch descriptions, use git to see what changed on the default
kernel (git whatchanged <kernel_type>..<bsp_name>). For example:

  # cd tmp-glibc/work-shared/<bsp_name>/kernel-source
  # git whatchanged standard/base..standard/intel-socfpga/sdk-4.12/intel-socfpga-64


4. Boot Instructions
====================

The DTB file can be built automatically or you can generate it manually in a
single step.

To generate the DTB manually, change into build directory, then run the
following:

  # bitbake -c devshell linux-yocto-dev
  # make altera/socfpga_stratix10_socdk.dtb"

The DTB can then be found in the

linux-<bsp_name>-<kernel type>-build/arch/arm64/boot/dts/altera

directory.

4.1 NFS Root File System
------------------------

Configure u-boot with target IP, tftp server, netmask and other required
network values.
 > tftp 0x2000000 "/<tftp root>/Image"
 > tftp 0x8000000 "/<tftp root>/socfpga_stratix10_socdk.dtb"
 > setenv bootargs console=ttyS1,115200 root=/dev/nfs rw \
          nfsroot=<nfs server>:<nfs root>,nolock \
          ip=<target IP>::<gateway>:<netmask>::eth0:off
 > booti 0x2000000 - 0x8000000

4.2 Rootfs on MMC/SD
--------------------

An ext3/ext4 filesystem can be created on the MMC/SD using standard
techniques.

4.2.1 Deployment
----------------

After loading the kernel, pass kernel arguments like following:

    root=/dev/mmcblk0p2 rw console=ttyS0,115200n8 rootwait

4.3 RAM Root File System
------------------------

4.3.1 Create initramfs image
----------------------------

Build the gzipped initramfs image as follows:

	# bitbake wrlinux-image-initramfs

The expected rootfs cpio archive will be in
"path_to_your_project/tmp/deploy/images/<bsp_name>", then
try to create an U-Boot image file as follows:

	# mkimage -A arm64 -T ramdisk -C gzip \
	  -d wrlinux-image-initramfs-intel-socfpga-64.cpio.gz \
	  intel-socfpga-64-initramfs.gz.uboot

4.3.2 Deployment
----------------

After the BootLoader bootup, load initramfs, kernel and DTB:

	# tftp 0x8000000 /<tftp root>/socfpga_stratix10_socdk.dtb
	# tftp 0x2000000 /<tftp root>/Image
	# tftp 0x5000000 intel-socfpga-initramfs.gz.uboot

then you need to set initrd_high to restrict positioning of initrd ramdisk images:

	# setenv initrd_high 0x8000000

and then you need to pass the kernel arguments as follows:

	# setenv bootargs 'root=/dev/ram0 rw ramdisk_size=0x6400'

Boot kernel with the following command:

	# booti 0x2000000 0x500000 0x8000000


5. Features Notes
=================

5.1 LWH2F Bridge
----------------
The pre-built SD Image allows you to test out the Lightweight HPS-to-FPGA (LWH2F) bridge on the Stratix 10 SoC.
This bridge connects the Hard Processor System (HPS) to the FPGA core logic and can control FPGA IPs such as FPGA
LEDs and switches.

5.1.1 Known issue
-----------------
Stratix 10 SOCFPGA doesn't support for controlling fpga bridge from linux kernel.
We can enable/disable fpga bridge in bootloader with command "bridge enable/disable"

5.2 HPS IO
----------
There are 3 LEDs on HPS IO48 OOBE Card that is a daughter card.
Run below command to turn on/off the 3 LEDs.
- To turn on/off HPS_LED1(D6):
root@stratix10swvp:~# echo 1 > /sys/class/leds/hps_led0/brightness
root@stratix10swvp:~# echo 0 > /sys/class/leds/hps_led0/brightness

- To turn on/off HPS_LED2(D8):
root@stratix10swvp:~# echo 1 > /sys/class/leds/hps_led1/brightness
root@stratix10swvp:~# echo 0 > /sys/class/leds/hps_led1/brightness

- To turn on/off HPS_LED3(D7):
root@stratix10swvp:~# echo 1 > /sys/class/leds/hps_led2/brightness
root@stratix10swvp:~# echo 0 > /sys/class/leds/hps_led2/brightness


6. Creating Partitioned Images(WIC)
===================================

You can use the OpenEmbedded Image Creator, wic, to create a properly
partitioned image on an SD card. The wic command generates partitioned images
from existing OpenEmbedded build artifacts.
For more information about WIC, see:

http://www.yoctoproject.org/docs/2.2/mega-manual/mega-manual.html#creating-partitioned-images

This BSP supports SD card disk images.
After building the project, you will have a WIC image under the directory
tmp-glibc/deploy/images/<bsp name>/, for example:

tmp-glibc/deploy/images/intel-socfpga-64/wrlinux-image-glibc-<rootfs_type>-intel-socfpga-64.wic

You can then write the output image to an SD card.

6.1 Burn images to SD card
--------------------------

To burn u-boot and WIC images to an SD card, you need to execute below command:

# dd if=wrlinux-image-glibc-<rootfs_type>-intel-socfpga-64.wic of=/dev/your_sd_dev

6.2 Set u-boot env
-----------------

The board can boot automatically by setting the following uboot environment variables:

mmcboot=setenv bootargs earlycon root=${mmcroot} rw rootwait;booti ${loadaddr} - ${fdt_addr}
mmcload=mmc rescan;load mmc 0:1 ${loadaddr} ${bootfile};load mmc 0:1 ${fdt_addr} ${fdtimage}
mmcroot=/dev/mmcblk0p2

=> setenv bootfile Image
=> setenv fdtimage socfpga_stratix10_socdk.dtb
=> setenv fdt_addr 8000000
=> setenv loadaddr 0x2000000
=> setenv mmcroot /dev/mmcblk0p2
=> setenv mmcboot 'setenv bootargs earlycon root=${mmcroot} rw rootwait;booti ${loadaddr} - ${fdt_addr}'
=> setenv mmcload 'mmc rescan;load mmc 0:1 ${loadaddr} ${bootfile};load mmc 0:1 ${fdt_addr} ${fdtimage}'
=> setenv bootcmd 'run mmcload; run linux_qspi_enable; run mmcboot'
=> saveenv; run bootcmd;


7. Tickless Feature
===================
When Tickless Feature is required, please add it by template in setup command line
	--templates=feature/full_nohz


8. Update FPGA configuration file
=================================
8.1 On the target, copy FPGA configuration file(*.rbf) to rootfs/lib/firmware,
    and make sure the name of *.rbf file is soc_s10_fpga_config.rbf.
	# cp xxx/ghrd_1sx280lu2f50e2vgs3_hps.rbf /lib/firmware/soc_s10_fpga_config.rbf
	# cp xxx/socfpga_stratix10_fpga_update.dtb /lib/firmware/

8.2 On the target, apply the overlay
	# mkdir /sys/kernel/config/device-tree/overlays/0
	# cd /lib/firmware/
	# echo socfpga_stratix10_fpga_update.dtb > /sys/kernel/config/device-tree/overlays/0/path

8.3 On the target, if you want to do programming again, delete the overlay first before doing step 8.2.
	# rmdir /sys/kernel/config/device-tree/overlays/0

9. Remote System Update
=======================

Please follow below steps to run remote system update feature

9.1 Install necessary tool
--------------------------
Please download below 2 tools from https://www.altera.com/downloads/download-center.html, linux version.
- SoC FPGA EDS Pro Edition v18.0
- Quartus Prime Pro Edition v18.0
Note: Please apply for license for building Stratix10 *.sof file.
      Customer also can get the pre-build *.sof file from ~/intelFPGA_pro/18.0/embedded/examples/hardware/s10_soc_devkit_ghrd/output_files

9.2 Setting up the build environment
------------------------------------
Start an embedded command shell
	# ~/intelFPGA_pro/18.0/embedded/embedded_command_shell.sh
Create the top folder used to store all the example files
	# rm -rf  ~/rsu_example
	# cd ~/rsu_example
Retrieve and setup the toolchain
	# wget https://releases.linaro.org/components/toolchain/binaries/7.2-2017.11/aarch64-linux-gnu/gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu.tar.xz
	# tar xf gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu.tar.xz
	# export PATH=`pwd`/gcc-linaro-7.2.1-2017.11-x86_64_aarch64-linux-gnu/bin/:$PATH
Setup the environment variables used to compile Linux and LIBRSU
	# export ARCH=arm64
	# export CROSS_COMPILE=aarch64-linux-gnu-

9.3 Building hardware project
-----------------------------
Create a few images for testing: 0-factory, 1-production1, 2-production2, 3-production3
	# cd ~/rsu_example
	# rm -rf hardware_designs
	# mkdir hardware_designs
	# cd hardware_designs
	# for version in {0..3}
	  do
		mkdir s10_soc_devkit_ghrd.$version
		cd s10_soc_devkit_ghrd.$version
		tar xf $SOCEDS_DEST_ROOT/examples/hardware/s10_soc_devkit_ghrd/tgz/*.tar.gz
		make clean
		make scrub_clean
		rm -rf *.qpf *.qsf *.txt *.bin *.qsys ip/qsys_top/ ip/subsys_jtg_mst/ ip/subsys_periph/
		sed -i 's/QUARTUS_DEVICE := 1SX280LU2F50E2VGS3/QUARTUS_DEVICE := 1SX280LU2F50E2VGS2/g' Makefile
		sed -i 's/0xACD5CAFE/0xABAB000'$version'/g' create_ghrd_qsys.tcl
		make generate_from_tcl
		make sof
		cd ..
	  done
	# cd ..

After building, there will be the following SOF files in the folder ~/rsu_example/hardware_designs/:
s10_soc_devkit_ghrd.0/output_files/ghrd_1sx280lu2f50e2vgs2.sof
s10_soc_devkit_ghrd.1/output_files/ghrd_1sx280lu2f50e2vgs2.sof
s10_soc_devkit_ghrd.2/output_files/ghrd_1sx280lu2f50e2vgs2.sof
s10_soc_devkit_ghrd.3/output_files/ghrd_1sx280lu2f50e2vgs2.sof

9.4 Building u-boot
-------------------
Run below commands to obtain the u-uoot source code and build it.
	# cd ~/rsu_example
	# rm -rf u-boot-socfpga
	# git clone https://github.com/altera-opensource/u-boot-socfpga
	# cd u-boot-socfpga
	# git checkout -t -b test_s10_rsu origin/socfpga_v2017.09
	# make clean && make mrproper
	# make socfpga_stratix10_defconfig
	# make -j 24
	# aarch64-linux-gnu-objcopy -I binary -O ihex --change-addresses 0xffe00000 spl/u-boot-spl-dtb.bin spl/u-boot-spl.hex
	# cd ..

After building, there will be the following files generated:
FSBL (U-boot SPL) hex file: ~/rsu_example/u-boot-socfpga/spl/u-boot-spl.hex
SSBL (U-Boot) image file: ~/rsu_example/u-boot-socfpga/u-boot-dtb.img

9.5 Add FSBL to the SOF file
----------------------------
The SOF files generated by the Quartus tool only contain the FPGA fabric configuration,
and we need to add the FSBL to them with the following commands:
# cd ~/rsu_example
# rm -rf sof_files
# mkdir sof_files
# for version in {0..3}
  do
	quartus_cpf --bootloader=u-boot-socfpga/spl/u-boot-spl.hex \
	hardware_designs/s10_soc_devkit_ghrd.$version/output_files/ghrd_1sx280lu2f50e2vgs2.sof sof_files/ghrd_hps.$version.sof
  done

After building, there will be the following files generated:
~/rsu_example/sof_files/ghrd_hps.0.sof
~/rsu_example/sof_files/ghrd_hps.1.sof
~/rsu_example/sof_files/ghrd_hps.2.sof
~/rsu_example/sof_files/ghrd_hps.3.sof


9.6 Creating the Initial Flash Image
------------------------------------
1) Go to the folder ~/ and create a file named quartus.ini containing the following two lines:
PGM_ALLOW_MT25Q=ON
PGM_ALLOW_MX66U=ON
The above file will allow the Quartus tools to use the Micron MT25Q and Macronix MX66U devices.

2) Start the Quartus Programmer tool by running the "quartus_pgmw" command.
	# quartus_pgmw

3) Click File > Programming File Generator .. to start the Programming File Generator Tool.

4) Select the Device family to be Stratix 10, and Configuration mode to be Active Serial x4.

5) Select the output file type as JIC, which is the format used by the Quartus Flash Programmer tool.
   Select the optiona .map and .rpd files to be generated. The .map file contains information
   about the flash layout. The .rpd file contains the full binary content of the flash, and is intended
   for external programmers. Change the Name to "initial_image".

6) Once the output type was selected, click on the Input Files tab.

7) In the Input Files tab click on Add Bitstream button, then browse to ~/rsu_example/sof_files/, select
   the file ghrd_hps.0.sof and click Open, ghrd_hps.0.sof is used to be the factory image. Do the same for
   the ghrd_hps.1.sof that is used to be initial production image.

8) After input file was added in the Input Files tab, click the Configuration Device tab.
   In the Configuration Device tab, click on Add Device, select the MT25QU02G in the pop-up window,
   then click OK. Once that is done, the window will show the default initial partitioning for RSU.

9) Select the FACTORY_IMAGE entry, and click the Edit… button. The Edit Partition window pops up.
   Select the Input file to be Bitstream_1 (ghrd_hps.0.sof). Change Address Mode to Block, because
   it is need to make sure that leave enough space for the biggest anticipated factory image.
   Set the End Address to 0x0090FFFF in order to reserve 8MB for the factory image. This end address
   was calculated by adding 16MB to the end of the BOOT_INFO partition. Click OK.

10) Select the MT25QU02G flash device in the Configuration Device tab by clicking it, then click the
    Add Partition button to open the Add Partition window. Leave the Name as P1 and select the Input
    file as Bitstream_2(ghrd_hps_1.sof). This will be the initial production image. Select the Page to
    be 1. It means it P1(initial production image) has the highest priority of all production images.
    Select the Address Mode as Block and allocate 16MB of data by setting Start Address = 0x01000000
    and End Address = 0x01FFFFFF.

11) Create another two partitions P2 and P3 using the same procedure as for the previous step, but set
    the Input file to None, leave Page unchanged (it does not matter for empty partitions).
    Select the Address Mode as Block and set the start and end addresses as follows:
	P2: Start Address = 0x02000000 and End Address = 0x02FFFFFF.
	P3: Start Address = 0x03000000 and End Address = 0x03FFFFFF.

12) Click Select … to select the Flash loader. The flash loader will become part of the JIC file and will
    be used by the Flash Programmer tool. Select the desired Device family and Device name as below:
	Device family: Stratix 10
	Device name: 1SX280LU2S2

13) Click on Generate button to generate the initial flash image as ~/rsu_example/initial_image.jic and
    the map file as ~/rsu_example/initial_image_jic.map.

14). Click on File > Save As .. and save the file as ~/rsu_example/initial_image.pfg. This file would be
     useful later, if it is need to re-generate the initial image, only one below command can generate it.
	# quartus_pfg -c initial_image.pfg

9.7 Create Remote Update Production Image
-----------------------------------------
The RSU Production Images is able to be created from the Programming File Generator GUI tool, but the easiest
way is to create them via below commands.
	# cd ~/rsu_example
	# rm -rf image_files && mkdir image_files
	# for version in {0..3}
	  do
		quartus_pfg -c sof_files/ghrd_hps.$version.sof image_files/ghrd_hps.$version.rpd -o mode=ASX4 -o start_address=0x00000 -o bitswap=ON
	  done

The following files will be created:
~/rsu_example/ image_files/ghrd_hps.0.rpd
~/rsu_example/ image_files/ghrd_hps.1.rpd
~/rsu_example/ image_files/ghrd_hps.2.rpd
~/rsu_example/ image_files/ghrd_hps.3.rpd

9.8 Building ZLIB
-----------------
The ZLIB is required by LIBRSU. The following steps can be used to build it:
cd ~/rsu_example
rm -rf zlib-1.2.11
wget http://zlib.net/zlib-1.2.11.tar.gz
tar xf zlib-1.2.11.tar.gz
rm zlib-1.2.11.tar.gz
cd zlib-1.2.11/
export LD=${CROSS_COMPILE}ld
export AS=${CROSS_COMPILE}as
export CC=${CROSS_COMPILE}gcc
./configure
make
export ZLIB_PATH=`pwd`
cd ..

After building, the following items will be available:
~/rsu_example/zlib-1.2.11/zlib.h 	– header file, used to compile files using zlib services
~/rsu_example/zlib-1.2.11/libz.so 	– shared object, use to run executables linked against zlinb services

9.9 Building LIBRSU and RSU Client
----------------------------------
The following commands isused to build the LIBRSU and the example client application:
	# cd ~/rsu_example
	# export ZLIB_PATH=`pwd`/zlib-1.2.11
	# rm -rf intel-rsu
	# git clone https://github.com/altera-opensource/intel-rsu
	# git checkout -t -b test_s10_rsu origin/master
	# cd intel-rsu
	# cd lib
	# sed -i 's/CFLAGS := -I..\/include\/ -fPIC -fPIE$/CFLAGS := -I..\/include\/ -fPIC -fPIE -I\$\(ZLIB_PATH\)/g' makefile
	# make
	# cd ..
	# cd example
	# sed -i 's/LDFLAGS := -L..\/lib\/ -lrsu -lz$/LDFLAGS := -L..\/lib\/ -lrsu -lz -L\$\(ZLIB_PATH\)/g' makefile
	# make
	# cd ..

The following files will be created:
~/rsu_example/intel-rsu/lib/librsu.so – shared object required at runtime for running applications using librsu
~/rsu_example/intel-rsu/etc/qspi.rc – resource file for librsu configuration
~/rsu_example/intel-rsu/example/rsu_client – example client application using librsu

9.10 Building the SD Card Image
-------------------------------
The bitstream containing the FPGA image and the FSBL is stored in flash, but the SSBL and the OS will be stored in SD card.
The following commands is used to create the SD card image:
	# cd ~/rsu_example
	# sudo rm -rf sd_card
	# mkdir sd_card && cd sd_card
	# wget https://releases.rocketboards.org/release/2017.05/gsrd/tools/make_sdimage.py
	# chmod +x make_sdimage.py
	# cp ../u-boot-socfpga/u-boot-dtb.img .
	# cp ../linux-socfpga/arch/arm64/boot/Image .
	# cp ../linux-socfpga/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dtb .
	# mkdir rootfs && cd rootfs
	# sudo tar jxf <project dir>/build/tmp-glibc/deploy/images/intel-socfpga-64/wrlinux-image-glibc-std-intel-socfpga-64-<generation time>.rootfs.tar.bz2
	# for version in {0..3}
	  do
		sudo cp ../../image_files/ghrd_hps.$version.rpd root/
	  done
	# sudo cp ../../intel-rsu/example/rsu_client root/
	# sudo cp ../../intel-rsu/lib/librsu.so lib64/
	# sudo cp ../../intel-rsu/etc/qspi.rc etc/librsu.rc
	# sudo cp ../../zlib-1.2.11/libz.so lib64/
	# cd ..
	# sudo ./make_sdimage.py -f \
	    -P rootfs/*,num=2,format=ext3,size=800M  \
	    -P u-boot-dtb.img,Image,socfpga_stratix10_socdk.dtb,num=1,format=vfat,size=100M  \
	    -s 1G  \
	    -n sd_card_image_s10_rsu.img

Note that the following items are included in the rootfs on the SD card:
 - ZLIB shared object. If there is the same version in rootfs, it is not necessary to copy again.
 - LIBRSU shared object and resource file
 - RSU client application
 - Remote updated production images
 - If customer uses file system on other media. For example, nfs rootfs, please copy above files
   into correct location directly.

9.11 Burn the initial image into qspi nor-flash
-----------------------------------------------
1) Make sure to insert qspi nor-flash card onto the S10 SoC Development Kit, connect with J14.

2) Configure the S10 SoC Development Kit DIP switch as follow, and then power on board.
	SW1: 1:OFF, 2-8:ON
	SW2: 1:ON 2:ON 3: ON 4: OFF
	SW3: all OFF
	SW4: 1:ON 2:OFF 3:OFF 4:ON

3) Start Quartus Programmer tool by running below command.
	# quartus_pgmw

4) Click on Hardware Setup then double-click on the Stratix 10L SoC DevKit to select it,
   and then click Close.

5) Click Auto Detect and select 1SX280LU3S2 device when prompted, and then click OK.

6) In the Quartus Programmer window, select the device, right-click it, and then select the Change File option.

7) Select the initial_image.jic file then click Open.

8) Click on the Program/Configure and Verify check-box.

9) Click the Start button to start burning into the QSPI flash. The Programmer will configure the device with
   the flash loader firstly, and then erase the device, at last, program the jic file and verify whether the file
   was written correctly.

10) After burning over, Go to File > Save As.. to save the current configuration as ~/rsu_example/initial_image.cdf.
   The file would be useful for writing again to flash without having to use the GUI by running the following command:
	# quartus_pgm initial_image.cdf

9.12 Run remote system update example
-------------------------------------

9.12.1 Run RSU feature from u-boot
----------------------------------
1) Write the SD card image ~/rsu_example/sd_card/sd_card_image_s10_rsu.img to a SD card with dd command,
   and then insert it on the SD card slot on the S10 HPS daughtercard.
   Customer also can load kernel, dtb and rootfs from other media(for example, network)

2) Configure the S10 SoC Development Kit DIP switch as below, so that load FSBL from QSPI:
	SW1: 1:OFF, 2-8rest:ON
	SW2: 1:ON 2:OFF 3:OFF 4: OFF
	SW3: all OFF
	SW4: 1:ON 2:OFF 3:OFF 4:ON

3) Power on Stratix 10 development board, at the serial console, press any key to enter u-boot command line.

4) Run "rsu list" command to display the RSU partitions, CPBs, the currently running image and the status:
	SOCFPGA_STRATIX10 # rsu list
	RSU: Remote System Update Status
	Current Image   : 0x01000000
	Last Fail Image : 0x00000000
	State           : 0x00000000
	Version         : 0x00000000
	Error locaton   : 0x00000000
	Error details   : 0x00000000
	RSU: Sub-partition table 0 offset 0x00910000
	RSU: Sub-partition table 1 offset 0x00918000
	SF: Detected mt25qu02g with page size 256 Bytes, erase size 4 KiB, total 256 MiB
	RSU: Sub-partition table content
	       BOOT_INFO        Offset: 0x0000000000000000      Length: 0x00110000      Flag : 0x00000003
	   FACTORY_IMAGE        Offset: 0x0000000000110000      Length: 0x00800000      Flag : 0x00000003
		      P1        Offset: 0x0000000001000000      Length: 0x01000000      Flag : 0x00000000
		    SPT0        Offset: 0x0000000000910000      Length: 0x00008000      Flag : 0x00000001
		    SPT1        Offset: 0x0000000000918000      Length: 0x00008000      Flag : 0x00000001
		    CPB0        Offset: 0x0000000000920000      Length: 0x00008000      Flag : 0x00000001
		    CPB1        Offset: 0x0000000000928000      Length: 0x00008000      Flag : 0x00000001
		      P2        Offset: 0x0000000002000000      Length: 0x01000000      Flag : 0x00000000
		      P3        Offset: 0x0000000003000000      Length: 0x01000000      Flag : 0x00000000
	RSU: CMF pointer block offset 0x00920000
	RSU: CMF pointer block's image pointer list
	Priority 1 Offset: 0x0000000001000000 nslot: 0

The above listing shows what we expected: that we have one factory image, and three production image slots,
with just P1 being used, there are no errors, and the currently loaded image is P1.

5) At the u-uoot console, run the command "rsu update 0x0110000" to tell SDM to load the factory image next time.
   The console will show as bekow:
	SOCFPGA_STRATIX10 # rsu update 0x0110000
	RSU: RSU update to 0x0000000000110000
	SOCFPGA_STRATIX10 #
	U-Boot SPL 2017.09-00103-g475f14c (May 07 2018 - 17:41:30)
	MPU         1000000 kHz
	L3 main     400000 kHz
	Main VCO    2000000 kHz
	Per VCO     2000000 kHz
	EOSC1       25000 kHz
	HPS MMC     50000 kHz
	UART        100000 kHz
	DDR: Initializing Hard Memory Controller
	...
	SOCFPGA_STRATIX10 #

6) Run the command "rsu list" again to check the new status:
	SOCFPGA_STRATIX10 # rsu list
	RSU: Remote System Update Status
	Current Image   : 0x00110000
	Last Fail Image : 0x00000000
	State           : 0x00000000
	Version         : 0x00000000
	Error locaton   : 0x00000000
	Error details   : 0x00000000
	RSU: Sub-partition table 0 offset 0x00910000
	RSU: Sub-partition table 1 offset 0x00918000
	SF: Detected mt25qu02g with page size 256 Bytes, erase size 4 KiB, total 256 MiB
	RSU: Sub-partition table content
	       BOOT_INFO        Offset: 0x0000000000000000      Length: 0x00110000      Flag : 0x00000003
	   FACTORY_IMAGE        Offset: 0x0000000000110000      Length: 0x00800000      Flag : 0x00000003
		      P1        Offset: 0x0000000001000000      Length: 0x01000000      Flag : 0x00000000
		    SPT0        Offset: 0x0000000000910000      Length: 0x00008000      Flag : 0x00000001
		    SPT1        Offset: 0x0000000000918000      Length: 0x00008000      Flag : 0x00000001
		    CPB0        Offset: 0x0000000000920000      Length: 0x00008000      Flag : 0x00000001
		    CPB1        Offset: 0x0000000000928000      Length: 0x00008000      Flag : 0x00000001
		      P2        Offset: 0x0000000002000000      Length: 0x01000000      Flag : 0x00000000
		      P3        Offset: 0x0000000003000000      Length: 0x01000000      Flag : 0x00000000
	RSU: CMF pointer block offset 0x00920000
	RSU: CMF pointer block's image pointer list
	Priority 1 Offset: 0x0000000001000000 nslot: 0

The status is basically as before, just that the currently running image is now listed as the factory image.

9.12.2 Run RSU feature from linux
---------------------------------
1) Power cycle the board until boot up linux system completely.

2) Log in system using "root" as user name. The password is also "root" if required.

3) Load the intel-rsu kernel driver with below command if system doesn't load it automatically.
	# modprobe /lib/modules/<kernel version>-yocto-<kernel type>/kernel/drivers/misc/intel-rsu.ko

4) Display the currently loaded image and the status by looking at the sysfs files created by the driver
	# cd /sys/devices/platform/soc:firmware:svc/soc:firmware:svc:rsu/
	# cat current_image
	16777216
	# cat error_details
	0
	# cat error_location
	0
	# cat state
	0
	# cat version
	0
	# cat fail_image
	0

5) Set reloading the factory image on next time booting up
	# cd /sys/devices/platform/soc:firmware:svc/soc:firmware:svc:rsu/
	# printf %i 0x0110000 > reboot_image

6) reboot system
	# reboot

7) Load again the intel-rsu module if system doesn't load it automatically, and display the status
   using the files from sysfs:
	# modprobe /lib/modules/<kernel version>-yocto-<kernel type>/kernel/drivers/misc/intel-rsu.ko 
	# cd /sys/devices/platform/soc:firmware:svc/soc:firmware:svc:rsu/
	# cat current_image
	1114112
	# cat error_details
	0
	# cat error_location
	821248
	# cat state
	-268369898
	# cat fail_image
	16777216

9.12.3 Run RSU feature from RSU Client Application
--------------------------------------------------
1) Power cycle the board until boot up linux system completely.

2) Log in system using "root" as user name. The password is also "root" if required.

3) Load the intel-rsu kernel driver with below command if system doesn't load it automatically.
	# modprobe /lib/modules/<kernel version>-yocto-<kernel type>/kernel/drivers/misc/intel-rsu.ko

4) Run the rsu_client without parameters, to display its help message
	# ./rsu_client
	--- RSU app usage ---
	-c|--count                        get the number of slots
	-l|--list slot_num                list the attribute info from the selected slot
	-z|--size slot_num                get the slot size in bytes
	-p|--priority slot_num            get the priority of the selected slot
	-E|--enable slot_num              set the selected slot as the highest priority
	-D|--disable slot_num             disable selected slot but to not erase it
	-a|--add file_name [-s|--slot] slot_num  add a new app image to the selected slot, the default slot is 0 if usery
	-e|--erase slot_num               erase app image from the selected slot
	-v|--verify file_name [-s|--slot] slot_num  verify app image on the selected slot, the default slot is 0 if usery
	-f|--copy file_name -s|--slot slot_num  read the data in a selected slot then write to a file
	-r|--request slot_num             request the selected slot to be loaded after the next reboot
	-g|--log                          print the status log
	-h|--help                         show usage message

5) Run rsu client commands that display information about the slots
	# ./rsu_client --count
	number of slots is 3
	Operation completed

	# ./rsu_client --list 0
	      NAME: P1
	    OFFSET: 0x0000000001000000
	      SIZE: 0x01000000
	  PRIORITY: 1
	Operation completed

	# ./rsu_client --list 1
	      NAME: P2
	    OFFSET: 0x0000000002000000
	      SIZE: 0x01000000
	  PRIORITY: [disabled]
	Operation completed

	# ./rsu_client --list 2
	      NAME: P3
	    OFFSET: 0x0000000003000000
	      SIZE: 0x01000000
	  PRIORITY: [disabled]
	Operation completed

6) Run rsu client command that displays the current status
	# ./rsu_client --log
	      VERSION: 0x00000000
		STATE: 0x00000000
	CURRENT IMAGE: 0x0000000001000000
	   FAIL IMAGE: 0x0000000000000000
	    ERROR LOC: 0x00000000
	ERROR DETAILS: 0x00000000
	Operation completed

7) Add the ghrd_hps.2.rpd remote update image to slot 2 and ghrd_hps.3.rpd to slot 1:
	# ./rsu_client --add ghrd_hps.2.rpd --slot 2
	Operation completed

	# ./rsu_client --add ghrd_hps.3.rpd --slot 1
	Operation completed

8) List again the slots, it will show the expected priorities, showing the order in which
   the update images were written, with the most recently written having the highest priority.
   The smaller the value, the higher the priority
	# ./rsu_client --list 0
	      NAME: P1
	    OFFSET: 0x0000000001000000
	      SIZE: 0x01000000
	  PRIORITY: 3
	Operation completed
	# ./rsu_client --list 1
	      NAME: P2
	    OFFSET: 0x0000000002000000
	      SIZE: 0x01000000
	  PRIORITY: 1
	Operation completed
	# ./rsu_client --list 2
	      NAME: P3
	    OFFSET: 0x0000000003000000
	      SIZE: 0x01000000
	  PRIORITY: 2
	Operation completed

9) Power cycle the board, boot Linux, load the RSU module if system doesn't load it automatically.
   And then display the status, it will show the P2 image running, as expected:
	# modprobe /lib/modules/<kernel version>-yocto-<kernel type>/kernel/drivers/misc/intel-rsu.ko
	root@stratix10:~# ./rsu_client --log
	      VERSION: 0x00000000
		STATE: 0x00000000
	CURRENT IMAGE: 0x0000000002000000
	   FAIL IMAGE: 0x0000000000000000
	    ERROR LOC: 0x00000000
	ERROR DETAILS: 0x00000000
	Operation completed

10) Tell SDM to load the P3 image on next time booting up
	# ./rsu_client --request 2
	Operation completed

11) reboot system.
	# reboot

12) Log in Linux, load the RSU module if system doesn't load it automatically.
    And then display the RSU status:
	# ./rsu_client --log
	      VERSION: 0x00000000
		STATE: 0x00000000
	CURRENT IMAGE: 0x0000000003000000
	   FAIL IMAGE: 0x0000000000000000
	    ERROR LOC: 0x00000000
	ERROR DETAILS: 0x00000000
	Operation completed


10. Memory ECC
==============

10.1 Enable ECC feature
-----------------------

Please refer to below link:
https://rocketboards.org/foswiki/Documentation/S10GSRDEnableHPS_DDR_ECC

If ECC feature is enabled, when board boots up, there is below output information.
SDRAM: Initializing ECC 0x00000000 - 0x80000000
SDRAM-ECC: Initialized success with 1343 ms

10.2 Verify ECC feature
-----------------------

Check whether ECC feature take effect, please follow below steps.

1) Enable kernel configure and then rebuild kernel
	CONFIG_EDAC_DEBUG=y

2) Boot up system and then login.

3) Check the error count
	# cat /sys/devices/system/edac/mc/mc0/ce_count
	0 (It should be zero)

4) Inject error
	#echo "C" > /sys/kernel/debug/edac/mc0/altr_trigger
	EDAC MC: Inject Single bit error
	EDAC MC0: 1 CE soc:eccmgr:sdramedac on mc#0csrow#0channel#0 (csrow:0 channel:0 page:0x0 offset:0x0 grain:8 syndrome:0x0)
	EDAC MC: Read Data [0x5A5A5A5A, 0xA5A5A5A5]

5) Check the error count again
	# cat /sys/devices/system/edac/mc/mc0/ce_count
	1 (It should be incremented by 1)