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Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #5425

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Merged
martin-frbg merged 1 commit into from
Aug 21, 2025

Increase assumed L2 sizes for RISCV X280 / ZVL256B and for SVE-capabl…

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Merged

Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #5425

Increase assumed L2 sizes for RISCV X280 / ZVL256B and for SVE-capabl…
7c18398
Select commit
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Failed to load commit list.
Cirrus CI / AppleM1/LLVM x86_64 xbuild succeeded Aug 21, 2025 in 4m 35s

Task Summary

Task successfully finished!

Details

⚠️ Not enough compute credits to prioritize tasks!
ℹ️ Scheduling was delayed due to a concurrency limit on community tasks
⚠️ Only [ghcr.io/cirruslabs/macos-runner:sonoma, ghcr.io/cirruslabs/macos-runner:sequoia] is allowed. Automatically upgraded to ghcr.io/cirruslabs/macos-runner:sequoia.

✅ 00:12 clone
✅ 04:15 compile
✅ 00:01 config

View more details on Cirrus CI