Skip to content

Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #5425

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
martin-frbg merged 1 commit into from
Aug 21, 2025

Increase assumed L2 sizes for RISCV X280 / ZVL256B and for SVE-capabl…

7c18398
Select commit
Loading
Failed to load commit list.
Merged

Increase L2 defaults for RISCV X280 / ZVL256B and ARM SVE targets in CMake cross-compilation #5425

Increase assumed L2 sizes for RISCV X280 / ZVL256B and for SVE-capabl…
7c18398
Select commit
Loading
Failed to load commit list.
Cirrus CI / AppleM1/LLVM armv7-androidndk xbuild succeeded Aug 21, 2025 in 3m 7s

Task Summary

Task successfully finished!

Details

⚠️ Not enough compute credits to prioritize tasks!
ℹ️ Scheduling was delayed due to a concurrency limit on community tasks
⚠️ Only [ghcr.io/cirruslabs/macos-runner:sonoma, ghcr.io/cirruslabs/macos-runner:sequoia] is allowed. Automatically upgraded to ghcr.io/cirruslabs/macos-runner:sequoia.

✅ 00:13 clone
✅ 02:49 compile
✅ 00:01 config

View more details on Cirrus CI