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Fix spi_drv & Add can_drv#56

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Rbb666 merged 4 commits intoRT-Thread-Studio:mainfrom
PeterJhon:fix_driver
Mar 30, 2026
Merged

Fix spi_drv & Add can_drv#56
Rbb666 merged 4 commits intoRT-Thread-Studio:mainfrom
PeterJhon:fix_driver

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.context = &scb_9_spi_context,
.intr_cfg = {.intrSrc = scb_9_IRQ, .intrPriority = INT_PRIORITY },
},
#ifndef BSP_SPI1_CS_PIN
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宏定义不用添加缩进,格式化下

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Pull request overview

This PR updates the PSE84 eval kit generated hardware configuration and refactors the RT-Thread HAL SPI driver while introducing a new CANFD driver.

Changes:

  • Regenerated Cypress/Infineon GeneratedSource configuration (toolchain/backend updates), including new CANFD routing/peripheral definitions and updated QSPI configurator metadata.
  • Refactored drv_spi to a new structure around mtb_hal_spi and SCB9-based SPI1, plus corresponding Kconfig updates.
  • Added a new CANFD RT-Thread device driver (drv_canfd.*) and build/Kconfig wiring to include CANFD PDL support.

Reviewed changes

Copilot reviewed 39 out of 41 changed files in this pull request and generated 5 comments.

Show a summary per file
File Description
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/qspi_config.cfg Updates QSPI configurator version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/device_mem.json Adds generated memory layout JSON for tooling.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_system.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_system.c Updates generated metadata and small PPC init wrapper changes.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_routing.h Reroutes pins (SPI->SCB9, adds CANFD pins) and makes routing init a no-op inline.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_routing.c Removes routing source implementation (now header-only no-op).
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_qspi_memslot.timestamp Updates QSPI configurator version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_qspi_memslot.h Updates QSPI tool version macro.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_qspi_memslot.c Updates QSPI configurator version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_protection.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_protection.c Adds SE disable call under certain secure/TZ conditions and updates metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_pins.h Adds SPI9 pin definitions and changes some pin drive modes/exports.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_pins.c Updates pin configs (incl. WiFi host wake interrupt edge/mask) and adds SPI9 pin init.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_peripherals.h Adds CANFD include/externs; renames SPI peripheral macros to SCB9-based SPI9.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_peripherals.c Large regeneration: adds CANFD channel config, updates SPI instance, updates graphics timings, etc.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_peripheral_clocks.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_peripheral_clocks.c Updates metadata and changes one divider value.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_notices.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_memory.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_dmas.h Removes generated DMA header (no longer used).
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_dmas.c Removes generated DMA source (no longer used).
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_connectivity_wifi.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_connectivity_bt.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_clocks.h Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_clocks.c Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg_clock_types.h Adds/updates doc comments in generated clock type definitions.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg.timestamp Updates configurator metadata and copyright year.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg.h Drops DMA header include to match removed DMA generated files.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/cycfg.c Updates generated backend/device-db version metadata.
projects/libs/TARGET_APP_KIT_PSE84_EVAL_EPC2/config/GeneratedSource/.hardware-config-server.generated-files Removes DMA files and adds device_mem.json to generated file list.
libraries/components/mtb-device-support-pse8xxgp/pdl/SConscript Adds CANFD PDL source when RT_USING_CAN is enabled.
libraries/M55_Config/Kconfig Updates SPI menu (SCB9 SPI1) and adds CANFD Kconfig options.
libraries/M33_Config/Kconfig Updates SPI menu (SCB9 SPI1) and adds CANFD Kconfig options.
libraries/HAL_Drivers/drv_spi.h Refactors SPI header API and include guard; introduces a new init declaration.
libraries/HAL_Drivers/drv_spi.c Refactors SPI driver implementation around SCB9 and mtb_hal_spi.
libraries/HAL_Drivers/drv_canfd.h Adds new CANFD driver public definitions.
libraries/HAL_Drivers/drv_canfd.c Adds new CANFD RT-Thread driver implementation.
libraries/HAL_Drivers/canfd_config.h Adds CANFD instance configuration macros and IRQ configs.
libraries/HAL_Drivers/SConscript Builds CANFD driver when RT_USING_CAN is enabled.

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Comment on lines +27 to 28
rt_err_t drv_spi_init(void);

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drv_spi_init() is declared here but there is no corresponding definition in the codebase (SPI init is currently done via rt_hw_spi_init() + INIT_BOARD_EXPORT). This will lead to unresolved symbols if any code includes this header and calls drv_spi_init(). Either provide an implementation (possibly a thin wrapper around rt_hw_spi_init()) or remove/rename the declaration to match the actual init entry point.

Suggested change
rt_err_t drv_spi_init(void);
rt_err_t rt_hw_spi_init(void);
static inline rt_err_t drv_spi_init(void)
{
return rt_hw_spi_init();
}

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Comment on lines +218 to 220
if (result != CY_RSLT_SUCCESS || wait_ret != RT_EOK)
return 0;

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On transfer failure this returns 0, but RT-Thread’s SPI core treats errors as result < 0 (see rt-thread/components/drivers/spi/spi_core.c). Returning 0 will be treated as success and can silently mask I/O failures. Return a negative error code (e.g. -RT_ERROR / -RT_EIO) when result != CY_RSLT_SUCCESS or the completion wait fails.

Suggested change
if (result != CY_RSLT_SUCCESS || wait_ret != RT_EOK)
return 0;
if (result != CY_RSLT_SUCCESS)
return -RT_EIO;
if (wait_ret != RT_EOK)
return -RT_ERROR;

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Comment on lines +188 to 190
if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS)) {
ifx_spi_set_cs(spi, (device->config.mode & RT_SPI_CS_HIGH) ? PIN_HIGH : PIN_LOW);
}
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CS handling here ignores device->cs_pin (set by rt_spi_bus_attach_device_cspin) and always toggles the single bus-level spi->cs_pin. This breaks the standard RT-Thread model of multiple devices on one SPI bus with different CS lines. Consider using device->cs_pin when it is not PIN_NONE (and only falling back to spi->cs_pin as a default).

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Comment on lines +39 to +44
#ifdef BSP_USING_CANFD1
extern const cy_stc_canfd_config_t CANFD1_config;

static cy_stc_sysint_t CANFD1_IRQ_cfg =
{
.intrSrc = canfd_1_interrupts0_0_IRQn,
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BSP_USING_CANFD1 configuration references an extern CANFD1_config, but there is no definition for it in the repo (only CYBSP_CAN_FD_CH_0_config is generated). Enabling CANFD1 will fail to link. Either generate/provide a CANFD1 config symbol or remove/guard the CANFD1 option/macros until the second instance is supported.

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Comment on lines +141 to +158
can->rx_fifo_msg = rxFIFOMsg;
can->rx_buf_fifo_num = msgBufOrRxFIFONum;
can->rx_id = rxBuffer->r0_f->id;
can->rx_rtr = rxBuffer->r0_f->rtr;
can->rx_xtd = rxBuffer->r0_f->xtd;

data_len = ifx_canfd_dlc_to_len((uint8_t)rxBuffer->r1_f->dlc);
if (data_len > IFX_CANFD_MAX_DATA_LEN)
{
data_len = IFX_CANFD_MAX_DATA_LEN;
}
can->rx_len = data_len;

rt_memset(can->rx_data, 0, sizeof(can->rx_data));
rt_memcpy(can->rx_data, (uint8_t *)rxBuffer->data_area_f, data_len);
can->rx_pending = true;

rt_hw_can_isr(&can->can_dev, RT_CAN_EVENT_RX_IND | ((rt_uint32_t)msgBufOrRxFIFONum << 8));
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RX ISR callback updates multiple shared fields (rx_id, rx_len, rx_data, etc.) that are later read in recvmsg() without any critical section/lock. This can lead to torn reads or inconsistent frames under interrupt load. Consider protecting these fields with an interrupt disable/enable pair (or a spinlock) when writing in the callback and when copying out in recvmsg().

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@PeterJhon PeterJhon force-pushed the fix_driver branch 3 times, most recently from 30a690c to d7eb971 Compare March 26, 2026 09:43
@Rbb666 Rbb666 merged commit 6e9899a into RT-Thread-Studio:main Mar 30, 2026
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3 participants