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Merge pull request #1085 from Pinata-Consulting/openroad-settings
Openroad settings
2 parents fd07501 + 0994d9f commit 0f102f7

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9 files changed

+55
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flow/.gitignore

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settings.mk

flow/Makefile

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# settings.mk is not under source control. Put variables into this
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# file to avoid having to adding the to the make command line.
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-include settings.mk
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# ==============================================================================
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# Uncomment or add the design to run
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# ==============================================================================

flow/designs/asap7/mock-array-big/Element/config.mk

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include designs/asap7/mock-array-big/defaults.mk
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export DESIGN_NAME = Element
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export DESIGN_NICKNAME = mock-array-big_Element
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@@ -10,8 +12,8 @@ export PLACE_DENSITY = 0.50
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export GPL_TIMING_DRIVEN = 0
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export GPL_ROUTABILITY_DRIVEN = 0
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export CORE_AREA = $(shell python3 designs/asap7/mock-array-big/ce_core_area.py)
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export DIE_AREA = $(shell python3 designs/asap7/mock-array-big/ce_die_area.py)
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export CORE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/ce_core_area.py)
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export DIE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/ce_die_area.py)
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export IO_CONSTRAINTS = designs/asap7/mock-array-big/Element/io.tcl
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# max routing layer need to be set to M5, since M6 is needed for next level up to connect
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# to the ring and stipe
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export MAX_ROUTING_LAYER = M5
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export PRIVATE_DIR=designs/asap7/mock-array-big

flow/designs/asap7/mock-array-big/README.md

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By default, the array is 8x8 elements and has an 8 bit datapath.
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To create a 4x4 element array with 4 bit datapath, run:
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To create a 4x4 element array with 4 bit datapath, first create a settings.mk file:
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MOCK_ARRAY_WIDTH=4 MOCK_ARRAY_HEIGHT=4 MOCK_ARRAY_DATAWIDTH=4 ./configure.sh
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MOCK_ARRAY_WIDTH=4 MOCK_ARRAY_HEIGHT=4 MOCK_ARRAY_DATAWIDTH=4 make DESIGN_CONFIG=designs/asap7/mock-array-big/config.mk
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```
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export MOCK_ARRAY_WIDTH=4
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export MOCK_ARRAY_HEIGHT=4
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export MOCK_ARRAY_DATAWIDTH=4
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export FLOW_VARIANT=small
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# use a different folder for each combination of parameters
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#export MOCK_ARRAY_WIDTH=16
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#export MOCK_ARRAY_HEIGHT=16
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#export MOCK_ARRAY_DATAWIDTH=64
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#export FLOW_VARIANT=giant
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export DESIGN_CONFIG=designs/asap7/mock-array-big/config.mk
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```
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Now run configure, which a custom target in mock-array-big, that runs Chisel to
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regenerate the Verilog code for the above configuration:
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```
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make verilog
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```
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Now build the design as usual:
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```
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make
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```

flow/designs/asap7/mock-array-big/config.mk

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include designs/asap7/mock-array-big/defaults.mk
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export DESIGN_NAME = MockArray
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export DESIGN_NICKNAME = mock-array-big
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export PLACE_DENSITY = 0.30
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export CORE_AREA = $(shell python3 designs/asap7/mock-array-big/core_area.py)
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export DIE_AREA = $(shell python3 designs/asap7/mock-array-big/die_area.py)
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export CORE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/core_area.py)
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export DIE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/die_area.py)
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BLOCKS = Element
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export PDN_TCL = designs/asap7/mock-array-big/pdn.tcl
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export TNS_END_PERCENT ?= 100
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export PRIVATE_DIR=designs/asap7/mock-array-big

flow/designs/asap7/mock-array-big/config.py

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import os
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# number of Elements in row and column, user can set via environment variable
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rows = int(os.environ.get("MOCK_ARRAY_HEIGHT", "8"))
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cols = int(os.environ.get("MOCK_ARRAY_WIDTH", "8"))
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rows = int(os.environ.get("MOCK_ARRAY_HEIGHT"))
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cols = int(os.environ.get("MOCK_ARRAY_WIDTH"))
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# Element placement pitch can be control by user
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pitch_scale = int(os.environ.get("MOCK_ARRAY_PITCH_SCALE", "2"))
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pitch_scale = int(os.environ.get("MOCK_ARRAY_PITCH_SCALE"))
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if pitch_scale < 1:
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raise Exception("Element placement pitch must be greater than 1")
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# single source of truth for defaults.
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export MOCK_ARRAY_WIDTH ?= 8
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export MOCK_ARRAY_HEIGHT ?= 8
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export MOCK_ARRAY_DATAWIDTH ?= 8
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export MOCK_ARRAY_PITCH_SCALE ?= 2
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.PHONY: verilog
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verilog:
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designs/asap7/mock-array-big/verilog.sh

flow/designs/asap7/mock-array-big/configure.sh renamed to flow/designs/asap7/mock-array-big/verilog.sh

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cd ../../src/mock-array-big
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sbt -Duser.home="$HOME" -Djline.terminal=jline.UnsupportedTerminal -batch \
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"test:runMain GenerateMockArray --width ${MOCK_ARRAY_WIDTH:-8} --height ${MOCK_ARRAY_HEIGHT:-8} --dataWidth ${MOCK_ARRAY_DATAWIDTH:-8} -- --emit-modules verilog --emission-options disableMemRandomization,disableRegisterRandomization --target-dir ."
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"test:runMain GenerateMockArray --width ${MOCK_ARRAY_WIDTH} --height ${MOCK_ARRAY_HEIGHT} --dataWidth ${MOCK_ARRAY_DATAWIDTH} -- --emit-modules verilog --emission-options disableMemRandomization,disableRegisterRandomization --target-dir ."
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# reduce git noise as these comments will change if the line numbers in MockArray.scala changes
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find . -name "*.v" -type f -exec sed -i 's/ \/\/.*$//' {} \;

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